>  - PAT support - first step towards phasing out MTRR's for cache 
 >    attribute control

I just grabbed your tree and I see that there is no
pgprot_writecombine() for x86.  I see that pci_mmap_page_range() handles
write combining but there's no way for a PCI driver to allow userspace
to mmap() part of a BAR with WC enabled.  Doing this gives a big
performance boost for running low-latency apps on InfiniBand hardware
driven by the mlx4 driver (look for the FIXME about it in
drivers/infiniband/hw/mlx4/main.c).  Are there any plans to handle this
somehow?

Thanks,
  Roland
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