On Tue, 2008-04-15 at 13:40 -0700, Kok, Auke wrote:
Actually it may be already removed. I remember it being under "Processor
type and features" and I currently cannot find it there for x86_64
I tried echoing 3 (assuming that CPU0 and CPU1 will share their cache,
as advised in other mails) into smp_affinity of all ethX interrupts and
no positive result was observed.
I will try disabling NAPI and limiting e1000 interrupts tomorrow.
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