Ok that should be in the changelog.
BTW x86 CPUs are not fully deterministic. e.g. there are a few errata that
can lead to differing EFLAGS (generally for instructions with undefined flags
output) based on random internal pipe line conditions.
In my experience even simulators claiming to be fully deterministic
are not always. e.g. I remember trying to use instruction counts
on Simics to reproduce an issue for a scripted boot setup (with no user input),
but it never quite hit the same code at the same instruction count.
There's also RDPMC, but by default the kernel does not enable that
for ring 3. And if you go for oddities there are the random number
generator instructions on VIA CPUs which will obviously not
be repeatable.
-Andi
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