On Wed, 19 Mar 2008 14:55:59 -0600
dougthompson@xmission.com wrote:

quoted text
> +/* Setup system bus parity mask register.
> + * Sysbus parity supported on:
> + *   e7320/e7520/e7525 + Xeon
> + *   i3100 + Xeon/Celeron
> + * Sysbus parity not supported on:
> + *   i3100 + Pentium M/Celeron M/Core Duo/Core2 Duo
> + */
> +static void e752x_init_sysbus_parity_mask(struct e752x_pvt *pvt)
> +{
> +	char *cpu_id = cpu_data(0).x86_model_id;
> +	struct pci_dev *dev = pvt->dev_d0f1;
> +	int enable = 1;
> +
> +	/* Allow module paramter override, else see if CPU supports parity */
> +	if (sysbus_parity != -1) {
> +		enable = sysbus_parity;
> +	} else if (cpu_id[0] &&
> +		   ((strstr(cpu_id, "Pentium") && strstr(cpu_id, " M ")) ||
> +		    (strstr(cpu_id, "Celeron") && strstr(cpu_id, " M ")) ||
> +		    (strstr(cpu_id, "Core") && strstr(cpu_id, "Duo")))) {
> +		e752x_printk(KERN_INFO, "System Bus Parity not "
> +			     "supported by CPU, disabling\n");
> +		enable = 0;
> +	}
> +
> +	if (enable)
> +		pci_write_config_word(dev, E752X_SYSBUS_ERRMASK, 0x0000);
> +	else
> +		pci_write_config_word(dev, E752X_SYSBUS_ERRMASK, 0x0309);
> +}

Is that the best way of working out whether the CPU supports system bus
parity?  We do have cpu capability infrastructure in x86 core and I'd have
though it would be better for x86 core to work this out, set the suitable
flag and have clients (ie: EDAC) test that flag?

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