On Thu, 13 Mar 2008 17:34:37 +0100 Pierre Ossman <drzeus-list@drzeus.cx> wrote:I've surfed Intel's web site for a bit, and found the MWAIT instruction in the arch docs. Unfortunately, it does not explain the value 0x50. According to the docs, that would be C6, which is not listed in the regular set of states for the Core 2. I did find this however: http://www.trustedreviews.com/cpu-memory/review/2007/03/30/Intel-Processor-Roadmap-Pen... It says that C6 is some ultra low power mode where more or less the entire chip is powered down. Len, Venkatesh, do you have some insight? And is it harmless to move to more power hungry modes (i.e. C4 or C3). Rgds -- -- Pierre Ossman Linux kernel, MMC maintainer http://www.kernel.org PulseAudio, core developer http://pulseaudio.org rdesktop, core developer http://www.rdesktop.org --
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