On Thu 2008-02-07 14:46:25, H. Peter Anvin wrote:
No interrupts. BIOS calls work on some machines, but I'd like this to
work when bios does not.
Actually, matthieu's code is probably better to start from:
+/* one ISA cycle @8Mhz */
+#define PAUSE outb %al, $0x80
+#define WAIT_100MS \
+ movl $800000, %eax; \
+ 2: \
+ PAUSE; \
+ dec %eax; \
+ jne 2b
+
+/* What's the PIT rate */
+#define COUNT 0xf89
#define BEEP \
- inb $97, %al; \
- outb %al, $0x80; \
- movb $3, %al; \
- outb %al, $97; \
- outb %al, $0x80; \
- movb $-74, %al; \
- outb %al, $67; \
- outb %al, $0x80; \
- movb $-119, %al; \
- outb %al, $66; \
- outb %al, $0x80; \
- movb $15, %al; \
- outb %al, $66;
+ /* enable counter 2 */ \
+ inb $0x61, %al; \
+ PAUSE; \
+ orb $3, %al; \
+ outb %al, $0x61; \
+ PAUSE; \
+ /* set command for counter 2, 2 byte write */ \
+ movb $0xB6, %al; \
+ outb %al, $0x43; \
+ PAUSE; \
+ /* select desired HZ */ \
+ movb $(COUNT & 0xff), %al; \
+ outb %al, $0x42; \
+ PAUSE; \
+ movb $(COUNT >> 8), %al; \
+ outb %al, $0x42; \
+ WAIT_100MS; \
+ /* disable counter 2 */ \
+ inb $0x61, %al; \
+ PAUSE; \
+ andb $0xFC, %al; \
+ outb %al, $0x61; \
+ WAIT_100MS
+
+#define CBEEP \
+ testl $4, realmode_flags - wakeup_code; \
+ jz 1f; \
+ BEEP; \
+1:
...because it allows user to compute number of beeps.
Pavel
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