Cc: Stephen Neuendorffer <stephen.neuendorffer@...>, Grant Likely <grant.likely@...>, Linux Kernel Mailing List <linux-kernel@...>, Andrew Morton <akpm@...>
On Thu, 2008-02-07 at 22:28 +0100, Jiri Slaby wrote:
For MMIO it's becoming more and more common actually in the embedded
space. Xilinx uses 405 cores which I think still only have a 32 bits
physical bus though, but if they ever extend it or switch to 440 they'll
have a 36 bits bus.
Ben.
--