> [probably stable material too]
>
> Use global TLB flushes in MTRR code
>
> Obviously kernel mappings should be flushed here too.
>
> Signed-off-by: Andi Kleen <ak@suse.de>
>
> ---
> arch/x86/kernel/cpu/mtrr/generic.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> Index: linux/arch/x86/kernel/cpu/mtrr/generic.c
> ===================================================================
> --- linux.orig/arch/x86/kernel/cpu/mtrr/generic.c
> +++ linux/arch/x86/kernel/cpu/mtrr/generic.c
> @@ -356,7 +356,7 @@ static void prepare_set(void) __acquires
> }
>
> /* Flush all TLBs via a mov %cr3, %reg; mov %reg, %cr3 */
> - __flush_tlb();
> + __flush_tlb_all();
>
> /* Save MTRR state */
> rdmsr(MTRRdefType_MSR, deftype_lo, deftype_hi);
> @@ -368,7 +368,7 @@ static void prepare_set(void) __acquires
> static void post_set(void) __releases(set_atomicity_lock)
> {
> /* Flush TLBs (no need to flush caches - they are disabled) */
> - __flush_tlb();
> + __flush_tlb_all();
>
> /* Intel (P6) standard MTRRs */
> mtrr_wrmsr(MTRRdefType_MSR, deftype_lo, deftype_hi);
> --
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