> On Tue, 18 Nov 2008 17:05:05 +0800 Bryan Wu <cooloney@kernel.org> wrote:
>
> > From: Graf Yang <graf.yang@analog.com>
> >
> > Blackfin dual core BF561 processor can support SMP like features.
> >
https://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-like
> >
> > In this patch, we provide SMP extend to Blackfin header files
> > and machine common code
> >
> >
> > ...
> >
> > +#define atomic_add_unless(v, a, u) \
> > +({ \
> > + int c, old; \
> > + c = atomic_read(v); \
> > + while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
> > + c = old; \
> > + c != (u); \
> > +})
>
> The macro references its args multiple times and will do weird or
> inefficient things when called with expressions which have
> side-effects, or which do slow things.
>
> >
> > ...
> >
> > +#include <asm/system.h> /* save_flags */
> > +
> > +static inline void set_bit(int nr, volatile unsigned long *addr)
> > {
> > int *a = (int *)addr;
> > int mask;
> > @@ -57,21 +91,23 @@ static __inline__ void clear_bit(int nr, volatile unsigned long *addr)
> > a += nr >> 5;
> > mask = 1 << (nr & 0x1f);
> > local_irq_save(flags);
> > - *a &= ~mask;
> > + *a |= mask;
>
> I think you just broke clear_bit(). Maybe I'm misreading the diff.