>> >This patch adds clflush_cache_range(), but it's not used anywhere.
quoted text
>> Clflush_cache_range() is used in __iommu_flush_cache() in include/linux/intel-iommu.h.

quoted text
>Oh, OK.  I didn't look hard enough to find __iommu_flush_cache()
> (currently in drivers/pci/intel-iommu.c).

quoted text
>Architecturally, I'm surprised that ia64 would need to actually do a
>cache flush.  I would think the VT-d hardware would do coherent accesses
>which would make the cache flush unnecessary.

VT-d hardware supports both non cache coherency and cache coherency by bit Coherency in Extended Capabilities Register.

Could you please point me to the doc that explicitly says that architecturally ia64 doesn't need cache flush?

Thanks.

-Fenghua
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