Cc: Ondrej Zary <linux@...>, H. Peter Anvin <hpa@...>, Rene Herman <rene.herman@...>, Bodo Eggert <7eggert@...>, Ingo Molnar <mingo@...>, Alan Cox <alan@...>, Paul Rolland <rol@...>, Pavel Machek <pavel@...>, Thomas Gleixner <tglx@...>, <linux-kernel@...>, Ingo Molnar <mingo@...>, <rol@...>
Not true. Even on the original IBM 5150 PC, the 8259 on the motherboard
accepted back to back OUT and IN instructions, and it would NOT trash
the chip state. You can read the original IBM BIOS code if you like. I
don't remember about the 8253's timing. I doubt the chip's state would
be corrupted in any way. The data and address lines were the same data
and address lines that the microprocessor used to access memory - it
didn't "hold" the lines stable any longer than the OUT instruction.
Register compatible. Not the same chips or even the same masks or
timing requirements.
Don't try to teach your grandmother to suck eggs: I've been programming
PC compatibles since probably before you were able to do long division -
including writing code on the first prototype IBM PCs, the first
pre-manufacturing PC-ATs, and zillions of clones. (and I was also
involved in designing hardware including the so-called "Lotus Intel"
expanded memory cards and the original PC cards) The 8259 PIC is an
*interrupt controller*. It was NEVER present in a Super I/O chip, or an
LPC chip. Its functionality was absorbed into the chipsets that control
interrupt mapping, like the PIIX and the nForce.
Oh, come on. Give the VLSI designers some credit for brains. The CAD
tools used to design the 8259 and 8253 were so primitive you couldn't
even get a chip manufactured with designs from that era today. When
people design chips today they do it with simulators that can't even
work, and testers that run from test suites that were not available at
the time.
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