There actually haven't been that many attempts to "get this fixed". It's been more a) people complaining about it and nothing being done about the problems and b) adding hacks to blindly disable it because of reported problems without root-causing why those problems were showing up. With such approaches no wonder it has not been reliable to try and use MMCONFIG in the past.. -- Robert Hancock Saskatoon, SK, Canada To email, remove "nospam" from hancockr@nospamshaw.ca Home Page: http...

From: Randy Dunlap <randy.dunlap@oracle.com> Remove the tmp file when exiting. Noticed by Arjan van de Ven. Catch mktemp failure and exit with message. Trap kill or other signals and exit cleanly. Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> --- scripts/decodecode | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) --- linux-2.6.24-rc7.orig/scripts/decodecode +++ linux-2.6.24-rc7/scripts/decodecode @@ -6,7 +6,19 @@ # e.g., to decode an i386 oop...

From: Mark A. Greer <mgreer@mvista.com> The clock to generate the desired baudrate with the MPSC is first divided by the Baud Rate Generator (BRG) and then by the MPSC itself. So, when the BRG divider is changed, the MPSC divider must also be changed to generate the correct baudrate. During MPSC initialization, the BRG divider is changed but the MPSC divider isn't changed until much later. This results in some printk's coming out garbled. To fix that, set the MPSC divider at the same time ...

Add a filename option (default to 0) in order to get the following summary output: ./scripts/checkpatch.pl --filename --file ./arch/sparc/kernel/apc.c ... ... ... ./arch/sparc/kernel/apc.c --> total: 18 errors, 3 warnings, 186 lines checked --- Andy, I wonder why checkpatch doesn't show all the command line options. At the moment, it only prints: options: -q => quiet --no-tree => run without a kernel tree --terse => one line per report --emac...

- Rename it to pte_exec() from pte_exec_kernel(). There is nothing kernel specific in there. - Move it into the common file because _PAGE_NX is 0 on !PAE and then pte_exec() will be always evaluate to true. Signed-off-by: Andi Kleen <ak@suse.de> --- arch/x86/mm/fault_32.c | 2 +- include/asm-x86/pgtable-2level.h | 8 -------- include/asm-x86/pgtable-3level.h | 8 -------- include/asm-x86/pgtable.h | 1 + 4 files changed, 2 insertions(+), 17 deletions(-) ...

Someone setting NX on the kernel text tends to result in nasty failures and triple faults, so BUG_ON early for that. Does not cover __inittext. Signed-off-by: Andi Kleen <ak@suse.de> --- arch/x86/mm/pageattr_32.c | 8 ++++++++ 1 file changed, 8 insertions(+) Index: linux/arch/x86/mm/pageattr_32.c =================================================================== --- linux.orig/arch/x86/mm/pageattr_32.c +++ linux/arch/x86/mm/pageattr_32.c @@ -242,6 +242,14 @@ __change_page_att...

And clarify description a bit. Only for 64bit, but the interfaces are identical for 32bit and kerneldoc should merge them (?) Signed-off-by: Andi Kleen <ak@suse.de> --- Documentation/DocBook/kernel-api.tmpl | 8 +++++ arch/x86/mm/pageattr_64.c | 46 +++++++++++++++++++++++++--------- 2 files changed, 42 insertions(+), 12 deletions(-) Index: linux/arch/x86/mm/pageattr_64.c =================================================================== --- linux.orig/arch/x86/...

When changing a page that has already been modified to non standard attributes before don't change the reference count. And when changing back a page only decrease the ref count if the old attributes were non standard. Signed-off-by: Andi Kleen <ak@suse.de> --- arch/x86/mm/pageattr_32.c | 44 +++++++++++++++++++++++++------------------- arch/x86/mm/pageattr_64.c | 16 ++++++++++++---- include/asm-x86/pgtable.h | 2 ++ 3 files changed, 39 insertions(+), 23 deletions(-) Index: l...

Otherwise the kernel will likely always run with 4K pages instead of 2MB pages, which is costly in terms of TLBs. Also optimize it a little bit by using only a single change_page_attr() calls. This is particularly useful if debugging is enabled inside it because it spams the logs much less. Signed-off-by: Andi Kleen <ak@suse.de> --- arch/x86/mm/init_64.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) Index: linux/arch/x86/mm/init_64.c ===========================...

With the separate data structure added for flush earlier it is only needed to call save_page() now on pte pages that have been already reverted. Also move all freeing checks into the caller. Signed-off-by: Andi Kleen <ak@suse.de> --- arch/x86/mm/pageattr_32.c | 4 +--- arch/x86/mm/pageattr_64.c | 7 +++---- 2 files changed, 4 insertions(+), 7 deletions(-) Index: linux/arch/x86/mm/pageattr_32.c =================================================================== --- linux.orig...

When c_p_a() detects a inconsistency in the kernel page tables it BUGs. When this happens dump the page table first to avoid one bug reporting round trip. Signed-off-by: Andi Kleen <ak@suse.de> --- arch/x86/mm/pageattr_32.c | 11 ++++++++++- arch/x86/mm/pageattr_64.c | 11 ++++++++++- 2 files changed, 20 insertions(+), 2 deletions(-) Index: linux/arch/x86/mm/pageattr_64.c =================================================================== --- linux.orig/arch/x86/mm/pageattr_64...

Use the page table level instead of the PSE bit to check if the PTE is for a 4K page or not. This makes the code more robust when the PAT bit is changed because the PAT bit on 4K pages is in the same position as the PSE bit. Signed-off-by: Andi Kleen <ak@suse.de> --- arch/x86/mm/pageattr_32.c | 4 ++-- arch/x86/mm/pageattr_64.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) Index: linux/arch/x86/mm/pageattr_32.c ====================================================...

Intel recommends to first flush the TLBs and then the caches on caching attribute changes. c_p_a() previously did it the other way round. Reorder that. The procedure is still not fully compliant to the Intel documentation because Intel recommends a all CPU synchronization step between the TLB flushes and the cache flushes. However on all new Intel CPUs this is now meaningless anyways because they support Self-Snoop and can skip the cache flush step anyways. Signed-off-by: Andi Kleen <ak...

Signed-off-by: Andi Kleen <ak@suse.de> --- arch/x86/mm/pageattr_64.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Index: linux/arch/x86/mm/pageattr_64.c =================================================================== --- linux.orig/arch/x86/mm/pageattr_64.c +++ linux/arch/x86/mm/pageattr_64.c @@ -95,7 +95,7 @@ static void flush_kernel_map(void *arg) /* When clflush is available always use it because it is much cheaper than WBINVD. */ if ((a->full_flush || ...

Instead of open coding the bit accesses uses standard style *PageDeferred* macros. Signed-off-by: Andi Kleen <ak@suse.de> --- arch/x86/mm/pageattr_32.c | 14 ++++++++++---- arch/x86/mm/pageattr_64.c | 11 +++++++++-- 2 files changed, 19 insertions(+), 6 deletions(-) Index: linux/arch/x86/mm/pageattr_64.c =================================================================== --- linux.orig/arch/x86/mm/pageattr_64.c +++ linux/arch/x86/mm/pageattr_64.c @@ -18,6 +18,13 @@ struct flus...

CONFIG_DEBUG_PAGEALLOC uses change_page_attr to map/unmap mappings for catching stray kernel mappings. But standard c_p_a() does a lot of unnecessary work for this simple case with pre-split mappings. Change kernel_map_pages to just access the page table directly which is simpler and faster. I also fixed it to use INVLPG if available. This is required for changes to c_p_a() later that make it use kmalloc. Without this we would risk infinite recursion. Also in general things are easier when ...

Needed for the next change. And change all the callers. Signed-off-by: Andi Kleen <ak@suse.de> --- arch/x86/mm/fault_32.c | 3 ++- arch/x86/mm/init_32.c | 3 ++- arch/x86/mm/pageattr_32.c | 7 +++++-- arch/x86/mm/pageattr_64.c | 7 +++++-- arch/x86/xen/mmu.c | 9 ++++++--- include/asm-x86/pgtable_32.h | 2 +- include/asm-x86/pgtable_64.h | 2 +- 7 files changed, 22 insertions(+), 11 deletions(-) Index: linux/arch/x86/mm/pageattr_...

Undo random white space changes. This reverts ddb53b5735793a19dc17bcd98b050f672f28f1ea I simply don't have the nerves to port a 20+ patch series to the reformatted version. And the patch series changes most lines anyways and drops the trailing white spaces there. And since this was a nop losing it for now isn't a problem. Signed-off-by: Andi Kleen <ak@suse.de> --- arch/x86/mm/pageattr_32.c | 149 ++++++++++++++++++++-------------------------- arch/x86/mm/pageattr_64.c | 137 ++++...

64bit already had it. Needed for later patches. Signed-off-by: Andi Kleen <ak@suse.de> --- include/asm-x86/pgtable-2level.h | 2 ++ include/asm-x86/pgtable-3level.h | 2 ++ 2 files changed, 4 insertions(+) Index: linux/include/asm-x86/pgtable-2level.h =================================================================== --- linux.orig/include/asm-x86/pgtable-2level.h +++ linux/include/asm-x86/pgtable-2level.h @@ -75,6 +75,8 @@ static inline int pte_exec_kernel(pte_t #defin...

When CONFIG_DEBUG_RODATA is enabled undo the ro mapping and redo it again. This gives some simple testing for change_page_attr() Optional patch, but I find it useful. Signed-off-by: Andi Kleen <ak@suse.de> --- arch/x86/Kconfig.debug | 5 +++++ arch/x86/mm/init_32.c | 26 ++++++++++++++++++++++++++ arch/x86/mm/init_64.c | 10 ++++++++++ 3 files changed, 41 insertions(+) Index: linux/arch/x86/mm/init_64.c =================================================================== ...

On a fresh object dir I get for a 32bit build: make -C /home/lsrc/quilt/linux O=/home/lsrc/quilt/obj32 GEN /home/lsrc/quilt/obj32/Makefile CHK include/linux/version.h CHK include/linux/utsrelease.h Using /home/lsrc/quilt/linux as source for kernel CALL /home/lsrc/quilt/linux/scripts/checksyscalls.sh CHK include/linux/compile.h Building modules, stage 2. MODPOST 1 modules make[3]: Nothing to be done for `vmlinux'. KBUILD_IMAGE := arch/x86/boot/bzImage make[...

Something I stumbled across just a few days ago: fdisk does cause the kernel to re-read the new partitions, but nothing causes udev to create any required new device nodes... Olaf --

please check the updated version, so we will not rely on MCFG setting it is against to x86.git these three patches can be applied seperately. if you think 1/3 is too complicated, you can apply 2 and 3 Thanks YH --

[PATCH 2/3] x86_64: check MSR to get MMCONFIG for AMD Family 10h Opteron So even MCFG is not there, we still can use MMCONFIG. Signed-off-by: Yinghai Lu <yinghai.lu@sun.com> Index: linux-2.6/arch/x86/pci/mmconfig-shared.c =================================================================== --- linux-2.6.orig/arch/x86/pci/mmconfig-shared.c +++ linux-2.6/arch/x86/pci/mmconfig-shared.c @@ -133,33 +133,84 @@ static const char __init *pci_mmcfg_inte return "Intel Corporation 945G/GZ/P/PL Exp...

The JMPRS register on Malta boards keeps a 32-bit CPU-endian value. The readw() function assumes that the value it reads is a little-endian 16-bit number. Therefore, using readw() to obtain the value of the JMPRS register is a mistake. This error leads to incorrect reading of the PCI clock frequency on big-endian during board start-up. Change readw() to __raw_readl(). This was tested by injecting a call to printk() and verifying that the value of the jmpr variable was consistent with current se...