Jeremy Fitzhardinge wrote:pv_cpu_ops, their To me such atomicity is provided by the "sti" instruction (i.e. the processor begins responding to external, maskable interrupts _after_ the next instruction is executed), and there is nothing special with that combination "sti; hlt" (you can also have like "sti; ret", for example). So if you define a PV ops like STI(next_instruction), "safe_halt" for the native should be defined as STI("hlt"), and inlined as "sti; hlt". If it's hard or we don't need to expose the semantics of "sti" other than that, I think it's okay to have a PV operation for safe_halt. Jun --- Intel Open Source Technology Center -
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