On Wednesday, 26 September 2007 20:51, Thomas Gleixner wrote:
quoted text
> On Wed, 2007-09-26 at 17:25 +0200, Rafael J. Wysocki wrote:
> > There still are some oddities.
> > 
> > First, with the "x86-64: Disable local APIC timer use on AMD systems with C1E"
> > patch and my collection of suspend patches applied, the box doesn't boot
> > (the suspend patches don't even thouch the boot code, so they should be
> > irrelevant here).  However, it boots if patch-2.6.23-rc7-hrt1.patch (adjusted
> > for 2.6.23-rc8) is applied in addition.  Is this expected?
> 
> No. That's odd. It is nothing else than adding "noapictimer" to the
> kernel command line.

Seems to be reproducible, though.  I'll investigate further.

quoted text
> > Next, on 2.6.23-rc8 with the patches from:
> > 
> > http://www.sisk.pl/kernel/hibernation_and_suspend/2.6.23-rc8/patches/
> > 
> > plus the "x86-64: Disable local APIC timer use on AMD systems with C1E" patch
> > and patch-2.6.23-rc7-hrt1.patch (adjusted for 2.6.23-rc8), hibernation doesn't
> > work correctly.  Although the box hibernates and restores, there is a temporary
> > "hang" during the "resume hardware" sequence, after which the "lock" led starts
> > to blink (and remains in this state) and something like this appears in dmesg:
> > 
> > Extended CMOS year: 2000
> > Enabling non-boot CPUs ...
> > SMP alternatives: switching to SMP code
> > Booting processor 1/2 APIC 0x1
> > Initializing CPU#1
> > Calibrating delay using timer specific routine.. 3990.36 BogoMIPS (lpj=7980735)
> > CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line)
> > CPU: L2 Cache: 512K (64 bytes/line)
> > Unable to handle kernel paging request at ffffffff806c64d4 RIP: 
> >  [<ffffffff802104cb>] identify_cpu+0x2ac/0x5a1
> 
> Hmm. That's really early in the CPU bring up. The only change in this
> area is the C1E patch. Can you decode the exact source line, where it is
> failing ?

Yes, I can, but I'll first see what's wrong with the boot.

Greetings,
Rafael
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