Re: [PATCH 24/25] r/o bind mounts: track number of mount writers

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To: Dave Hansen <haveblue@...>
Cc: <linux-kernel@...>, <hch@...>
Date: Monday, September 24, 2007 - 6:25 pm

On Mon, 24 Sep 2007 15:06:42 -0700
Dave Hansen <haveblue@us.ibm.com> wrote:


hm.  I saw that warning on my 2-way.  It has CONFIG_NR_CPUS=8 so perhaps
the kernel has decided that this machine can possibly have eight CPUs.

It's an old super-micro board, doesn't have ACPI.

OEM ID: INTEL    Product ID: 440BX        APIC at: 0xFEE00000
Processor #0 6:8 APIC version 17
Processor #1 6:8 APIC version 17
I/O APIC #2 Version 17 at 0xFEC00000.
Enabling APIC mode:  Flat.  Using 1 I/O APICs
Processors: 2

...

Checking if this processor honours the WP bit even in supervisor mode... Ok.
Calibrating delay using timer specific routine.. 1707.03 BogoMIPS (lpj=3414067)
Mount-cache hash table entries: 512
CPU: After generic identify, caps: 0383fbff 00000000 00000000 00000000 00000000 00000000 00000000 00000000
CPU: L1 I cache: 16K, L1 D cache: 16K
CPU: L2 cache: 256K
CPU: After all inits, caps: 0383fbff 00000000 00000000 00000040 00000000 00000000 00000000 00000000
Intel machine check architecture supported.
Intel machine check reporting enabled on CPU#0.
Compat vDSO mapped to ffffe000.
Checking 'hlt' instruction... OK.
lockdep: not fixing up alternatives.
CPU0: Intel Pentium III (Coppermine) stepping 03
lockdep: not fixing up alternatives.
Booting processor 1/1 eip 2000
Initializing CPU#1
Calibrating delay using timer specific routine.. 1704.02 BogoMIPS (lpj=3408054)
CPU: After generic identify, caps: 0383fbff 00000000 00000000 00000000 00000000 00000000 00000000 00000000
CPU: L1 I cache: 16K, L1 D cache: 16K
CPU: L2 cache: 256K
CPU: After all inits, caps: 0383fbff 00000000 00000000 00000040 00000000 00000000 00000000 00000000
Intel machine check architecture supported.
Intel machine check reporting enabled on CPU#1.
CPU1: Intel Pentium III (Coppermine) stepping 03
Total of 2 processors activated (3411.06 BogoMIPS).
ExtINT not setup in hardware but reported by MP table
ENABLING IO-APIC IRQs
..TIMER: vector=0x31 apic1=0 pin1=2 apic2=0 pin2=0
APIC timer registered as dummy, due to nmi_watchdog=1!
checking TSC synchronization [CPU#0 -> CPU#1]: passed.
Brought up 2 CPUs


One would think that the kernel would work out that eight CPUs ain't
possible on such a machine.  But we don't seem to print out any info which
allows me to confirm that this is really what the kernel did.


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Messages in current thread:
[PATCH 00/25] Read-only bind mounts, Dave Hansen, (Thu Sep 20, 3:52 pm)
Re: [PATCH 24/25] r/o bind mounts: track number of mount wri..., Christoph Hellwig, (Mon Sep 24, 1:54 pm)
Re: [PATCH 24/25] r/o bind mounts: track number of mount wri..., Christoph Hellwig, (Mon Sep 24, 3:24 pm)
Re: [PATCH 24/25] r/o bind mounts: track number of mount wri..., Andrew Morton, (Mon Sep 24, 6:25 pm)
Re: [PATCH 24/25] r/o bind mounts: track number of mount wri..., Arjan van de Ven, (Mon Sep 24, 10:34 am)
[PATCH 25/25] honor r/w changes at do_remount() time, Dave Hansen, (Thu Sep 20, 3:53 pm)
[PATCH 23/25] do_rmdir(): elevate write count, Dave Hansen, (Thu Sep 20, 3:53 pm)
[PATCH 06/25] elevate write count open()'d files, Dave Hansen, (Thu Sep 20, 3:52 pm)
Re: [PATCH 06/25] elevate write count open()'d files, Andrew Morton, (Wed Nov 28, 4:41 am)
Re: [PATCH 06/25] elevate write count open()'d files, Dave Hansen, (Wed Nov 28, 1:33 pm)
[PATCH 19/25] elevate write count for do_utimes(), Dave Hansen, (Thu Sep 20, 3:53 pm)
[PATCH 02/25] rearrange may_open() to be r/o friendly, Dave Hansen, (Thu Sep 20, 3:52 pm)
[RFC] detect missed mnt_want_write() calls, Dave Hansen, (Tue Sep 25, 9:34 pm)
[PATCH 09/25] make access() use mnt check, Dave Hansen, (Thu Sep 20, 3:53 pm)
[PATCH 05/25] r/o bind mounts: stub functions, Dave Hansen, (Thu Sep 20, 3:52 pm)
[PATCH 04/25] create cleanup helper svc_msnfs(), Dave Hansen, (Thu Sep 20, 3:52 pm)
[PATCH 03/25] give may_open() a local 'mnt' variable, Dave Hansen, (Thu Sep 20, 3:52 pm)
Re: [PATCH 03/25] give may_open() a local 'mnt' variable, Christoph Hellwig, (Thu Sep 20, 3:57 pm)