Andi Kleen wrote:
quoted text
> Jesse Barnes <jesse.barnes@intel.com> writes:
>   
>> To do this in a nicer way (and be less vulnerable to similar BIOS 
>> funkiness) the kernel really needs full PAT support.  That should allow 
>> WC over WB and WC over UC mappings to occur, at least if I'm 
>> remembering the docs right...
>>     
>
> PAT only really helps for device driver performance optimizations.
> But if the basic WB MTRRs are wrong PAT cannot really salvage it. 
>   

Is there any reason not to set the MTRRs to define the entire memory as 
write back, and use PAT exclusively for setting cacheability?

On my home machine for instance, the BIOS uses all 8 MTRRs leaving none 
for X.  I hacked it by merging a couple of MTRRs but this isn't a 
generic solution.

-- 
error compiling committee.c: too many arguments to function

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