/var/log # grep -Ei "hpet|tsc" dmesg-2.6.19.7 dmesg.2.6.22.6-x86_64
dmesg-2.6.19.7:ACPI: HPET (v001 INTEL DQ965GF 0x000015db MSFT 0x01000013) @ 0x3e6f2000
dmesg-2.6.19.7:ACPI: HPET id: 0x8086a201 base: 0xfed00000
dmesg-2.6.19.7:[ 34.337155] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0
dmesg-2.6.19.7:[ 34.337296] hpet0: 3 64-bit timers, 14318180 Hz [*]
dmesg-2.6.19.7:[ 34.338350] Using HPET for base-timer
dmesg-2.6.19.7:[ 34.594096] checking TSC synchronization across 2 CPUs: passed.
dmesg-2.6.19.7:[ 0.215896] hpet_resources: 0xfed00000 is busy
dmesg-2.6.19.7:[ 7.794166] Time: tsc clocksource has been installed.
dmesg.2.6.22.6-x86_64:ACPI: HPET 3E6F2000, 0038 (r1 INTEL DQ965GF 1741 MSFT 1000013)
dmesg.2.6.22.6-x86_64:ACPI: HPET id: 0x8086a201 base: 0xfed00000
dmesg.2.6.22.6-x86_64:[ 0.000000] hpet clockevent registered
dmesg.2.6.22.6-x86_64:[ 0.000000] TSC calibrated against HPET
dmesg.2.6.22.6-x86_64:[ 23.917469] checking TSC synchronization [CPU#0 -> CPU#1]:
dmesg.2.6.22.6-x86_64:[ 23.937970] Measured 196 cycles TSC warp between CPUs, turning off TSC clock.
dmesg.2.6.22.6-x86_64:[ 23.938030] Marking TSC unstable due to check_tsc_sync_source failed
dmesg.2.6.22.6-x86_64:[ 23.968187] Time: hpet clocksource has been installed.
dmesg.2.6.22.6-x86_64:[ 23.997754] hpet_acpi_add: no address or irqs in _CRS
# grep MHz /proc/cpuinfo
cpu MHz : 2797.203
cpu MHz : 2797.203
# calc 2797203000/196
~14271443.87755102040816326531 [*]
so, does TSC calibration against HPET screw up TSC synchronization?
I have Intel(R) Pentium(R) D CPU 2.80GHz and
DQ965GF motherboard, BIOS v.5953.
--
Do what you love because life is too short for anything else.
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| David Miller | [GIT]: Networking |
| Gerrit Renker | [PATCH 27/37] dccp: Integration of dynamic feature activation - part 2 (server side) |
| David Miller | Re: [PATCH] pkt_sched: Destroy gen estimators under rtnl_lock(). |
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