This is the driver for latest Blackfin BF54x nand flash controller
- use nand_chip and mtd_info common nand driver interface
- provide both PIO and dma operation
- compiled with ezkit bf548 configuration
- use hardware 1-bit ECC
- tested with YAFFS2 and can mount YAFFS2 filesystem as rootfsSigned-off-by: Bryan Wu <bryan.wu@analog.com>
---
drivers/mtd/nand/Kconfig | 18 +
drivers/mtd/nand/Makefile | 1 +
drivers/mtd/nand/bf54x_nand.c | 796 ++++++++++++++++++++++++++++++++
include/asm-blackfin/mach-bf548/dma.h | 1 +
include/asm-blackfin/mach-bf548/nand.h | 47 ++
5 files changed, 863 insertions(+), 0 deletions(-)
create mode 100644 drivers/mtd/nand/bf54x_nand.c
create mode 100644 include/asm-blackfin/mach-bf548/nand.hdiff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 7992c43..87e9f80 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -131,6 +131,24 @@ config MTD_NAND_AU1550
This enables the driver for the NAND flash controller on the
AMD/Alchemy 1550 SOC.+config MTD_NAND_BF54X
+ tristate "NAND Flash support for Blackfin BF54X SoC DSP"
+ depends on BF54x && MTD_NAND
+ help
+ This enables the NAND flash controller on the BF54X SoC DPSs
+
+ No board specific support is done by this driver, each board
+ must advertise a platform_device for the driver to attach.
+
+config MTD_NAND_BF54X_HWECC
+ bool "BF54X NAND Hardware ECC"
+ depends on MTD_NAND_BF54X
+ help
+ Enable the use of the BF54X's internal ECC generator when
+ using NAND. Early versions of the chip have had problems with
+ incorrect ECC generation, and if using these, the default of
+ software ECC is preferable.
+
config MTD_NAND_RTC_FROM4
tristate "Renesas Flash ROM 4-slot interface board (FROM_BOARD4)"
depends on SH_SOLUTION_ENGINE
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index b16d234..cbf2bab 100644
--- a/drivers/mtd/nand/Makefile
+++ ...
comment doesn't match code.
I'd have though that the MM tricks here need a comment so readers know
-
Things are fixed in the try#3 version of the driver, which will be sent
Try to prevent board configuration missing the bf54x_nand_platform
Thanks
-Bryan Wu
-
that isnt static so checkpatch.pl wouldnt have caught it ... it should
be static though of course and then checkpatch.pl would have thrown a
static init 0 warning :)
-mike
-
box:/usr/src/25> perl scripts/checkpatch.pl ~/x
ERROR: do not initialise externals to 0 or NULL
#186: FILE: drivers/mtd/nand/bf54x_nand.c:73:-
Actually, it would caught by checkpatch.pl even without static.
Andrew, I think I sent out the try#2 version of this patch which fixed
these checkpatch.pl issues. But I will continue do some cleanup as you
point out.Thanks
-Bryan Wu
-
it doesnt for me, but maybe i'm just using an older version
-mike
-
Yes, should use the latest git-tree checkpatch.pl
Thanks
-Bryan
-
i'd just describe it as "Blackfin on-chip NAND" rather than sticking
rather than advertising this, i'd just keep it in the driver ...
presumably there are anomaly #'s for when the ECC is wrong, so we can
make the code depend on those
-mike
-
I will get rid of this BF54X and use BF5XX for (BF54x and BF52x and
This option is quite common in the NAND driver. If there are anomaly
#'s, code can still depend on those by using hardware_ecc varible. This
option is very useful when someone need software_ecc.Thanks
- Bryan Wu
-
Comparing against plat->page_size in one case, but mtd->writesize in the
other? And elsewhere it seems plat->page_size is treated as a boolean,
indicating only 256-byte vs. 512-byte pages (you don't support 2KiB or
other page sizes at all?)--
dwmw2-
When enabled hardware ECC, NFC of BF54x supports 256 and 512 bytes page
size ECC.
it's maybe little confusing with the NAND chip's pagesize. When NAND
chip is 2KiB or other page size, this driver can use multiple 256/512
pages to do hardware ECC. And it's handled by the driver software here.-Bryan Wu
-
Hi, Bryan!
Looks great!
Will this driver also work for the new BF52x series of the Blackfin Series?
(Or is it planned to make it work for... anytime soon.)Thank you!
--
Clemens Koller
__________________________________
R&D Imaging Devices
Anagramm GmbH
Rupert-Mayer-Straße 45/1
Linhof Werksgelände
D-81379 München
Tel.089-741518-50
Fax 089-741518-19
http://www.anagramm-technology.com
-
the order for porting of new chips is:
u-boot -> core kernel -> peripheralswe generally dont bother looking at peripherals until the earlier stuff is done
-mike
-
| Greg Kroah-Hartman | [PATCH 004/196] Chinese: add translation of SubmittingPatches |
| Rafael J. Wysocki | [Bug #11210] libata badness |
| Andrea Arcangeli | [PATCH 00 of 11] mmu notifier #v16 |
| Andrew Morton | Re: -mm merge plans for 2.6.23 -- sys_fallocate |
git: | |
| Gerrit Renker | [PATCH 27/37] dccp: Integration of dynamic feature activation - part 2 (server side) |
| Daniel Eischen | Re: error with thread |
| David Miller | Re: [GIT]: Networking |
| Jarek Poplawski | Re: [PATCH] pkt_sched: Destroy gen estimators under rtnl_lock(). |
