>
http://bugzilla.kernel.org/show_bug.cgi?id=8833
> We write 0xffffffff to BARs to detect BAR size, this will change BAR
> base to 0xfxxxxxx depends on BAR size. In the bug, PCI MCFG base address
> is 0xf4000000. One PCI device (gfx) has a 256M BAR, the detection code
> will temprarily change it to 0xf0000000, so conflict with MCFG decode
> range. Later memory based config space read/write address is decoded by
> both MCH and gfx and cause a hang. This patch disables resource decode
> in BAR size detection to avoid resource conflict.