hi,

quoted text
> > About SDRAm self refresh mode on at91sam926x, in fact AT91_SDRAMC_SRR
> > doesn't exist but the new register is AT91_SDRAMC_LPR. So for instance, you
> > can replace at91_sys_write(AT91_SDRAMC_SRR, 1) by
> > at91_sys_write(AT91_SDRAMC_LPR, AT91_SDRAMC_LPCB_SELF_REFRESH).
> 
> I have also made that change in pm.c.

I think we will go with the following change for now.
We need to pull in different header files anyway.

(This file will need to be re-looked at if we ever allow compiling a
single kernel image that supports multiple AT91 processors)


--- pm.c	6 Jul 2007 09:18:01 -0000	1.5
+++ pm.c	24 Aug 2007 07:22:13 -0000
@@ -27,12 +27,24 @@
 #include <asm/mach-types.h>
 
 #include <asm/arch/at91_pmc.h>
-#include <asm/arch/at91rm9200_mc.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/cpu.h>
 
 #include "generic.h"
 
+#ifdef CONFIG_ARCH_AT91RM9200
+#include <asm/arch/at91rm9200_mc.h>
+
+#define sdram_selfrefresh_enable()	at91_sys_write(AT91_SDRAMC_SRR, 1)
+#define sdram_selfrefresh_disable()
+
+#else
+#include <asm/arch/at91sam926x_mc.h>
+
+#define sdram_selfrefresh_enable()	at91_sys_write(AT91_SDRAMC_LPR, AT91_SDRAMC_LPCB_SELF_REFRESH)
+#define sdram_selfrefresh_disable()	at91_sys_write(AT91_SDRAMC_LPR, AT91_SDRAMC_LPCB_DISABLE)
+
+#endif
 
 static int at91_pm_valid_state(suspend_state_t state)
 {
@@ -172,7 +184,7 @@
 			 */
 			asm("b 1f; .align 5; 1:");
 			asm("mcr p15, 0, r0, c7, c10, 4");	/* drain write buffer */
-			at91_sys_write(AT91_SDRAMC_SRR, 1);	/* self-refresh mode */
+			sdram_selfrefresh_enable();		/* self-refresh mode */
 			/* fall though to next state */
 
 		case PM_SUSPEND_ON:
@@ -188,6 +200,7 @@
 			at91_sys_read(AT91_AIC_IPR) & at91_sys_read(AT91_AIC_IMR));
 
 error:
+	sdram_selfrefresh_disable();
 	target_state = PM_SUSPEND_ON;
 	at91_irq_resume();
 	at91_gpio_resume();


Regards,
  Andrew Victor


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