On Tue, Aug 21, 2007 at 12:35:22PM -0700, akepner@sgi.com wrote:So, let me try to understand ... your hardware allows writes from the device to pass other writes from the device? Doesn't that violate the PCI spec? I'm thinking about this (page 43 of PCI 2.3): Posted memory writes moving in the same direction through a bridge will complete on the destination bus in the same order they complete on the originating bus. Even if a single burst on the originating bus is terminated with Disconnect on the destination bus so that it is broken into multiple transactions, those transactions must not allow the data phases to complete on the destination bus in any order other than their order on the originating bus. So any device driver used on your hardware has to add a call to this new function, or it'll see data corruption? Not acceptable, IMO. If this is a performance optimisation, then by all means add a function drivers can call to say "it's OK, I know about this brokenness, and I don't depend on it", but safety first. -- "Bill, look, we understand that you're interested in selling us this operating system, but compare it to ours. We can't possibly take such a retrograde step." -
| Tarkan Erimer | Re: Dual-Licensing Linux Kernel with GPL V2 and GPL V3 |
| Greg Kroah-Hartman | [PATCH 005/196] Chinese: add translation of SubmittingDrivers |
| Andrew Morton | 2.6.23-rc6-mm1 |
| Eric Paris | [RFC 0/5] [TALPA] Intro to a linux interface for on access scanning |
| Gerrit Renker | [PATCH 27/37] dccp: Integration of dynamic feature activation - part 2 (server side) |
| David Miller | [GIT]: Networking |
| Jarek Poplawski | [PATCH] pkt_sched: Destroy gen estimators under rtnl_lock(). |
| Natalie Protasevich | [BUG] New Kernel Bugs |
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