On Tue, Aug 21, 2007 at 07:33:49PM +1000, Paul Mackerras wrote:
It's even irrelevant on x86 because all modifying operations on atomic_t
are coded in inline assembler and will always be RMW no matter
if atomic_t is volatile or not.
[ignoring atomic_set(x, atomic_read(x) + 1) which nobody should do]
The only issue is if atomic_t should have a implicit barrier or not.
My personal opinion is yes -- better safe than sorry. And any code
impact it may have is typically dwarved by the next cache miss anyways,
so it doesn't matter much.
-Andi
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