> > > Are misaligned/cross-cache-line updates atomic?
quoted text
> > 
> > In theory yes, in practice there can be errata of course. 

Afaik the theory is "Platform specific; most x86 will be in practice";
it's up to the system vendor and chipset vendor. 

The practice is "mixed ball, slow as h*ck anyway, just never ever do it"


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