Re: [PATCH] [16/35] i386: Add an option for the VIA C7 which sets appropriate L1 cache

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From: Jeff Garzik
Date: Saturday, April 28, 2007 - 11:08 am

Andi Kleen wrote:

Has it been verified in the field that this CPU supports CMOV?

	Jeff



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Messages in current thread:
[PATCH] [6/35] x86_64: remove clustered APIC mode, Andi Kleen, (Sat Apr 28, 10:52 am)
[PATCH] [10/35] x86: adjust inclusion of asm/fixmap.h, Andi Kleen, (Sat Apr 28, 10:52 am)
[PATCH] [12/35] x86: consolidate smp_send_stop(), Andi Kleen, (Sat Apr 28, 10:52 am)
[PATCH] [14/35] i386: mtrr range check correction, Andi Kleen, (Sat Apr 28, 10:52 am)
[PATCH] [15/35] i386: pit_latch_buggy has no effect, Andi Kleen, (Sat Apr 28, 10:52 am)
[PATCH] [17/35] i386: probe_roms() cleanup, Andi Kleen, (Sat Apr 28, 10:52 am)
[PATCH] [21/35] x86_64: Some cleanup in time.c, Andi Kleen, (Sat Apr 28, 10:52 am)
[PATCH] [24/35] i386: Add __init to probe_bigsmp, Andi Kleen, (Sat Apr 28, 10:52 am)
[PATCH] [30/35] i386: clean up mach_reboot_fixups, Andi Kleen, (Sat Apr 28, 10:52 am)
[PATCH] [32/35] x86_64: Remove unused set_seg_base, Andi Kleen, (Sat Apr 28, 10:52 am)
Re: [PATCH] [16/35] i386: Add an option for the VIA C7 whi ..., Jeff Garzik, (Sat Apr 28, 11:08 am)