On Sat 2007-12-22 12:09:59, Arjan van de Ven wrote:
Are you sure? I always assumed that memtest just used patterns bigger
than L1/L2 caches... ... and IIRC my celeron testing confirmed it, if
I disabled L2 cache in BIOS, memtest behave differently.
Anyway, if you can do iopl(), we may as well let you disable caches,
but you are right, that will need a kernel patch.
Pavel
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