Rene Herman wrote:
quoted text
> Good day.
> 
> Would some people on x86 (both 32 and 64) be kind enough to compile and
> run the attached program? This is about testing how long I/O port access
> to port 0x80 takes. It measures in CPU cycles so CPU speed is crucial in
> reporting.
> 
> Posted a previous incarnation of this before, buried in the outb 0x80
> thread which had a serialising problem. This one should as far as I can
> see measure the right thing though. Please yell if you disagree...
> 
> For me, on a Duron 1300 (AMD756 chipset) I have a constant:
> 
> rene@7ixe4:~/src/port80$ su -c ./port80
> cycles: out 2400, in 2400
> 
> and on a PII 400 (Intel 440BX chipset) a constant:
> 
> rene@6bap:~/src/port80$ su -c ./port80
> cycles: out 553, in 251
> 
> Results are (mostly) independent of compiler optimisation, but testing
> with an -O2 compile should be most useful. Thanks!

(AMD 1.8GHz Turion, running at 800MHz. ATI RS480 - Mitac 8350 mobo)

nigel@home:~/Downloads$ gcc port80.c -o port80
nigel@home:~/Downloads$ sudo ./port80
cycles: out 1235, in 1207
nigel@home:~/Downloads$ sudo ./port80
cycles: out 1238, in 1205
nigel@home:~/Downloads$ sudo ./port80
cycles: out 1237, in 1209
nigel@home:~/Downloads$ gcc -O2 port80.c -o port80
nigel@home:~/Downloads$ sudo ./port80
cycles: out 1844674407370794, in 1844674407369408
nigel@home:~/Downloads$ sudo ./port80
cycles: out 1844674407370795, in 1844674407369404
nigel@home:~/Downloads$ sudo ./port80
cycles: out 1844674407370795, in 1844674407369409
nigel@home:~/Downloads$ sudo ./port80
cycles: out 1844674407370798, in 1844674407369407
nigel@home:~/Downloads$ cat /proc/cpuinfo
processor       : 0
vendor_id       : AuthenticAMD
cpu family      : 15
model           : 36
model name      : AMD Turion(tm) 64 Mobile Technology ML-34
stepping        : 2
cpu MHz         : 800.000
cache size      : 1024 KB
fpu             : yes
fpu_exception   : yes
cpuid level     : 1
wp              : yes
flags           : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge
mca cmov pat pse36 clflush mmx fxsr sse sse2 syscall nx mmxext fxsr_opt
lm 3dnowext 3dnow rep_good pni lahf_lm
bogomips        : 1592.87
TLB size        : 1024 4K pages
clflush size    : 64
cache_alignment : 64
address sizes   : 40 bits physical, 48 bits virtual
power management: ts fid vid ttp tm stc


Regards,

Nigel
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