> The LPC bus behaviour is absolutely and precisely defined. The timing of
quoted text
> the inb is defined in bus clocks which is perfect as the devices needing
> delay are running at a fraction of busclock usually busclock/2.
> 
> Older processors did not have a high precision timer so you couldn't
> calibrate loop based delays for 1uS.

For newer CPUs udelay() would be probably fine though. We seem
to have several documented examples now where the bus aborts
trigger hardware bugs, and it is always better to avoid such situations.

I still think the best strategy would be to switch based on TSC
availability. Perhaps move out*_p out of line to avoid code bloat.

-Andi

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