Re: How do I debug PCI resource allocation problems

Previous thread: [PATCH] uvesafb: Fix warnings about unused variables on non-x86 by Frank Lichtenheld on Thursday, November 8, 2007 - 4:08 pm. (2 messages)

Next thread: [PATCH] Add quirk to set AHCI mode on ICH boards by Riki Oktarianto on Thursday, November 8, 2007 - 7:02 pm. (29 messages)
From: Robert Hancock
Date: Thursday, November 8, 2007 - 4:51 pm

Looks like the BIOS reserved part of that memory range already. Question 


64-bit capable PCI devices can indeed have BARs which can be located 
above 4GB. However, I can't see why lspci is detecting that from this 
configuration space: the BAR contents for region 2 are 20000008, which 
means prefetchable memory at 0x20000000 which can be located anywhere 
within 32-bit memory space. That doesn't make any sense though, since 
that's in the middle of RAM! Quite likely this bogus resource setting of 
the graphics controller is a large part of your problem. Question is 

This looks more reasonable, though it's still mapped the BAR over top of 

That looks more reasonable (e0000000, not 20000000). The last 4 bits are 
used to encode the prefetchable flag and memory space. Question is how 


-- 
Robert Hancock      Saskatoon, SK, Canada
To email, remove "nospam" from hancockr@nospamshaw.ca
Home Page: http://www.roberthancock.com/

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Previous thread: [PATCH] uvesafb: Fix warnings about unused variables on non-x86 by Frank Lichtenheld on Thursday, November 8, 2007 - 4:08 pm. (2 messages)

Next thread: [PATCH] Add quirk to set AHCI mode on ICH boards by Riki Oktarianto on Thursday, November 8, 2007 - 7:02 pm. (29 messages)