Re: [patch 5/8] Immediate Values - x86 Optimization

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To: Rusty Russell <rusty@...>
Cc: <akpm@...>, <linux-kernel@...>, Andi Kleen <ak@...>, H. Peter Anvin <hpa@...>, Chuck Ebbert <cebbert@...>, Christoph Hellwig <hch@...>, Jeremy Fitzhardinge <jeremy@...>, Ingo Molnar <mingo@...>, Thomas Gleixner <tglx@...>
Date: Thursday, November 15, 2007 - 1:37 am

* Rusty Russell (rusty@rustcorp.com.au) wrote:

yes and no.. do_nmi uses the "bust spinlocks" exactly for this. So this
is ok by design. Other than this, we can end up mixing up the console
data output with different sources of characters, but I doubt something
really bad can happen (like a deadlock).


Yup, see arch/x86/kernel/nmi_64.c : nmi_watchdog_tick()

It defines a spinlock to "Serialise the printks". I guess it's good to
protect against other nmi watchdogs running on other CPUs concurrently,
I guess.


So should we put a warning telling "enabling tracing or profiling on a
production system that also uses NMI watchdog could potentially cause a
crash" ? The rarer a bug is, the more difficult it is to debug. It does
not make the bug hurt less when it happens.

The normal thing to do when a potential deadlock is detected is to fix
it, not to leave it there under the premise that it doesn't matter since
it happens rarely. In our case, where we know there is a potential race,
I don't see any reason not to make sure it never happens. What's the
cost of it ?

arch/x86/kernel/immediate.o : 2.4K

let's compare..

kernel/stop_machine.o : 3.9K

so I think that code size is not an issue there, especially since the
immediate values are not meant to be deployed on embedded systems.


Yup, looping in IPIs with interrupts disabled should do the job there.
It's just awful for interrupt latency on large SMP systems :( Being
currently bad at it is not a reason to make it worse. If we have a CPU
that is within a high latency irq disable region when we send the IPI,
we can easily end up waiting for this critical section to end with
interrupts disabled on all CPUs. The fact that we would wait for the
longest interrupt disable region with IRQs disabled implies that we
increase the maximum latency of the system, by design. I'm not sure I
would like to be the new longest record-beating IRQ off region.

Mathieu


-- 
Mathieu Desnoyers
Computer Engineering Ph.D. Student, Ecole Polytechnique de Montreal
OpenPGP key fingerprint: 8CD5 52C3 8E3C 4140 715F  BA06 3F25 A8FE 3BAE 9A68
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Messages in current thread:
[patch 5/8] Immediate Values - x86 Optimization, Mathieu Desnoyers, (Tue Nov 13, 2:58 pm)
Re: [patch 5/8] Immediate Values - x86 Optimization, Rusty Russell, (Wed Nov 14, 11:08 pm)
Re: [patch 5/8] Immediate Values - x86 Optimization, Mathieu Desnoyers, (Thu Nov 15, 12:06 am)
Re: [patch 5/8] Immediate Values - x86 Optimization, Rusty Russell, (Thu Nov 15, 12:45 am)
Re: [patch 5/8] Immediate Values - x86 Optimization, Mathieu Desnoyers, (Thu Nov 15, 1:37 am)
Re: [patch 5/8] Immediate Values - x86 Optimization, Rusty Russell, (Thu Nov 15, 7:06 am)
Re: [patch 5/8] Immediate Values - x86 Optimization (simplif..., Mathieu Desnoyers, (Fri Nov 16, 10:03 am)
Re: [patch 5/8] Immediate Values - x86 Optimization (simplif..., Mathieu Desnoyers, (Mon Nov 19, 3:15 pm)
Re: [patch 5/8] Immediate Values - x86 Optimization (simplif..., Mathieu Desnoyers, (Mon Nov 19, 10:28 am)
Re: [patch 5/8] Immediate Values - x86 Optimization (simplif..., Mathieu Desnoyers, (Tue Nov 20, 1:02 pm)
Re: [patch 5/8] Immediate Values - x86 Optimization, H. Peter Anvin, (Tue Nov 13, 3:07 pm)
Re: [patch 5/8] Immediate Values - x86 Optimization, Mathieu Desnoyers, (Tue Nov 13, 3:24 pm)
Re: [patch 5/8] Immediate Values - x86 Optimization, H. Peter Anvin, (Tue Nov 13, 3:36 pm)
Re: [patch 5/8] Immediate Values - x86 Optimization, Mathieu Desnoyers, (Tue Nov 13, 3:45 pm)
Re: [patch 5/8] Immediate Values - x86 Optimization, H. Peter Anvin, (Tue Nov 13, 3:56 pm)
Re: [patch 5/8] Immediate Values - x86 Optimization (update), Mathieu Desnoyers, (Tue Nov 13, 4:40 pm)
Re: [patch 5/8] Immediate Values - x86 Optimization (update), Mathieu Desnoyers, (Tue Nov 13, 6:02 pm)
Re: [patch 5/8] Immediate Values - x86 Optimization (update), Mathieu Desnoyers, (Tue Nov 13, 8:34 pm)
Re: [patch 5/8] Immediate Values - x86 Optimization (update 2), Mathieu Desnoyers, (Tue Nov 13, 9:44 pm)
[PATCH] Immediate Values x86 Optimization Declare Discarded ..., Mathieu Desnoyers, (Wed Nov 14, 2:52 pm)
[PATCH] Add __discard section to x86, Mathieu Desnoyers, (Wed Nov 14, 3:16 pm)
Re: [PATCH] Add __discard section to x86, H. Peter Anvin, (Wed Nov 14, 3:33 pm)
Re: [patch 5/8] Immediate Values - x86 Optimization (update 2), Mathieu Desnoyers, (Wed Nov 14, 10:16 am)