MCG_CAP never reports a negative count of available error-reporting banks.
Therefore, make it unsigned.
Check for MCA/MCE feature bits as early as possible.
Signed-off-by: Christoph Egger <Christoph.Egger@amd.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
arch/i386/kernel/cpu/mcheck/mce.c | 13 ++++++++++++-
arch/i386/kernel/cpu/mcheck/mce.h | 2 +-
2 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/arch/i386/kernel/cpu/mcheck/mce.c b/arch/i386/kernel/cpu/mcheck/mce.c
index 34c781e..bad2c64 100644
--- a/arch/i386/kernel/cpu/mcheck/mce.c
+++ b/arch/i386/kernel/cpu/mcheck/mce.c
@@ -17,7 +17,7 @@
#include "mce.h"
int mce_disabled = 0;
-int nr_mce_banks;
+unsigned int nr_mce_banks;
EXPORT_SYMBOL_GPL(nr_mce_banks); /* non-fatal.o */
@@ -33,9 +33,20 @@ void fastcall (*machine_check_vector)(struct pt_regs *, long error_code) = unexp
/* This has to be run for each processor */
void mcheck_init(struct cpuinfo_x86 *c)
{
+ uint32_t mca, mce;
+
if (mce_disabled==1)
return;
+ mca = cpu_has(c, X86_FEATURE_MCA);
+ mce = cpu_has(c, X86_FEATURE_MCE);
+
+ if (!mca || !mce) {
+ printk(KERN_INFO "CPU%i: No machine check support available\n",
+ smp_processor_id());
+ return;
+ }
+
switch (c->x86_vendor) {
case X86_VENDOR_AMD:
amd_mcheck_init(c);
diff --git a/arch/i386/kernel/cpu/mcheck/mce.h b/arch/i386/kernel/cpu/mcheck/mce.h
index 81fb6e2..9cbe812 100644
--- a/arch/i386/kernel/cpu/mcheck/mce.h
+++ b/arch/i386/kernel/cpu/mcheck/mce.h
@@ -10,5 +10,5 @@ void winchip_mcheck_init(struct cpuinfo_x86 *c);
/* Call the installed machine check handler for this CPU setup. */
extern fastcall void (*machine_check_vector)(struct pt_regs *, long error_code);
-extern int nr_mce_banks;
+extern unsigned int nr_mce_banks;
--
1.5.2.5
-
