Re: pci-disable-decode-of-io-memory-during-bar-sizing.patch

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To: Linus Torvalds <torvalds@...>
Cc: Robert Hancock <hancockr@...>, Greg KH <greg@...>, Jesse Barnes <jbarnes@...>, <akpm@...>, <rajesh.shah@...>, linux-kernel <linux-kernel@...>
Date: Tuesday, October 30, 2007 - 2:50 pm

> At that point, almost all the issues with mmconfig just go away, BECAUSE 

We seem to slowly grow more uses of registers > 256, but yes it's still mostly 
non critical stuff.
 

At least for the AMD GART IOMMU I would prefer if that was not done.
It has a pci config space access in a time critical path (flush).
And Family10h supports accessing the northbridge using mmconfig.

I believe the tigon3 driver also does config space access frequently
on some chips.

Also there are still the old x86 Macs where conf1 doesn't work.

-Andi
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Messages in current thread:
Re: pci-disable-decode-of-io-memory-during-bar-sizing.patch, Linus Torvalds, (Tue Oct 30, 11:15 am)
Re: pci-disable-decode-of-io-memory-during-bar-sizing.patch, Andi Kleen, (Tue Oct 30, 2:50 pm)
Re: pci-disable-decode-of-io-memory-during-bar-sizing.patch, Arjan van de Ven, (Tue Oct 30, 12:47 pm)
Re: pci-disable-decode-of-io-memory-during-bar-sizing.patch, Arjan van de Ven, (Tue Oct 30, 7:52 pm)
Re: pci-disable-decode-of-io-memory-during-bar-sizing.patch, Arjan van de Ven, (Tue Oct 30, 1:28 pm)
Re: pci-disable-decode-of-io-memory-during-bar-sizing.patch, Arjan van de Ven, (Thu Nov 1, 10:08 am)