> But we don't actually know what it is, and it could change with
quoted text
> different architectures or versions of gcc. I think the sanest thing
> is for gcc to help us out here, seeing as there is this very well
> defined requirement that we want.
> 
> If you really still want the optimisation to occur, 

I don't think it makes sense for memory. It may may make sense for registers.

But given that my kernel doesn't seem to contain any instances
at all it's probably not too useful for it anyways.

So I wouldn't have a problem disabling it, but it would
be better if they fixed their heuristics to only apply it when
it makes sense. 

Unfortunately it's not possible as far as I know with current gccs.
I didn't think you can disable only ADC/SBB.

Disabling all of CMOV would be a pity though. Also I don't think
there is any way to do that except selecting a CPU architecture
that doesn't support it which would have other bad side effects
on the code.

-Andi
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