Hi David, [BTW. can you retain cc lists, please?] On Thursday 25 October 2007 14:29, David Schwartz wrote:A *conditional* store should no be a problem. However the funny trick of doing this conditional add (implemented with unconditional store), is what is going to cause breakage. On the CPUs where predicated instructions are a big win, I'd expect they should also implement a conditional store for use here. However they might be slower than an unconditional store (eg. x86's cmov), and in those cases, gcc might just do the non-conditional store. This is not just a question of data that you were going to use anyway. gcc generates memory accesses to locations that would never be accessed Even stores. It is basically impossible to say that this is a real performance win. Even on single threaded code: consider that cache misses take the vast majority of time in many loads, which gives a little hint that maybe it's a bad idea to do this ;) I'd never say the optimisation would always be useless. But it's a nasty thing to have on by default, and apparently even with no good way to supress it even if we want to. Either way, I think we really need a way to turn it off for Linux. -
| Tarkan Erimer | Re: Dual-Licensing Linux Kernel with GPL V2 and GPL V3 |
| Greg KH | [GIT PATCH] driver core patches against 2.6.24 |
| Ingo Molnar | [git pull] x86 arch updates for v2.6.25 |
| Anton Salikhmetov | [PATCH -v8 2/4] Update ctime and mtime for memory-mapped files |
git: | |
| Patrick McHardy | Re: [GIT]: Networking |
| Jarek Poplawski | [PATCH] pkt_sched: Destroy gen estimators under rtnl_lock(). |
| Gerrit Renker | [PATCH 16/37] dccp: API to query the current TX/RX CCID |
| Andrew Morton | Re: [BUG] New Kernel Bugs |
