On Altix, DMA may be reordered between a device and host memory. 
This reordering can happen in the NUMA interconnect, and it usually 
results in correct operation and improved performance. In some 
situations it may be necessary to explicitly synchronize DMA from 
the device.

This patchset allows a memory region to be mapped with a "dmabarrier". 
Writes to the memory region will cause in-flight DMA to be flushed, 
providing a mechanism to order DMA from a device.

There are 5 patches in this patchset:

  [1/5] dma: add dma_flags_set_attr() to dma interface
  [2/5] dma: redefine dma_flags_set_attr() for sn-ia64
  [3/5] dma: document dma_flags_set_attr()
  [4/5] infiniband: add "dmabarrier" argument to ib_umem_get()
  [5/5] mthca: allow setting "dmabarrier" on user-allocated memory

-- 
Arthur

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