> OTOH, it's no magic - they claim OHCI 1.1 and they do it. We don't
BTW: I've looked at it a bit closer and it seems the EEPROM lines
are controlled by VT6307 I/O ports (region #1) 0x0 and 0x20:
01:04.0 FireWire (IEEE 1394): VIA Technologies, Inc. IEEE 1394 Host
Controller (rev 80) (prog-if 10 [OHCI])
Memory at feafe800 (32-bit, non-prefetchable) [size=2K]
I/O ports at d480 [size=128]
^^^^^^^^^^^^^^^^^^^^^^^^^^^^
port 0x20 R/O bit 8 is set in 93c46 mode and reset in I^2C mode
port 0x20 bit 4 must be set to drive CS, CLK and DATA-OUT outputs
port 0x20 bits 3, 2 and 1 are, respectively, CS, CLK and DATA-OUT
pins in 93c46 mode and unused, SCL and SDA pins in I^2C mode
port 0x20 R/O bit 0 is DATA-IN input in 93c46 mode
port 0x0 bit 8 must be set to enable access
port 0x20 must be written 0x20 (bit 5 only) to disable access
(clears port 0x0 bit 8).
They are all 32-bit I/O ports.
The above allows for complete control in 93c46 mode (I'll make the
program available later) and unfortunately I don't yet know how to
read SDA (and SCL) state in I^2C mode (I can blindly write to the
EEPROM and I can read the EEPROM data using GUID PROM register so
there is a workaround).
--
Krzysztof Halasa
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