No, we do catch the one place where it happens. The problem seems to
be that the hardware update takes some time. That is, on one side we
take the write lock, talk to the EHCI hardware, and drop the write
lock. On the other side we take the read lock, talk to the OHCI
hardware, and drop the read lock. Nevertheless, the interference
occurs. David B.'s interpretation is that the hardware's change of
state takes more time than the CPU uses in manipulating locks and
switching tasks. Hence his suggestion for adding a delay.
Alan Stern
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