Re: LFENCE instruction (was: [rfc][patch 3/3] x86: optimise barriers)

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To: H. Peter Anvin <hpa@...>
Cc: Arjan van de Ven <arjan@...>, Nick Piggin <npiggin@...>, Linux Kernel Mailing List <linux-kernel@...>
Date: Tuesday, October 16, 2007 - 6:17 am

On Mon, 15 Oct 2007, H. Peter Anvin wrote:


PREFETCH* doesn't change program semantics. The processor is allowed to 
ignore prefetch instruction if it doesn't have resources needed for 
prefetch. It not ordered wrt. fences.

PREFETCHNTA was implemented as prefetch into L1 cache and omitting L2 
cache on Pentium 3 and M --- and it is implemented as prefetch into L2 
cache on other --- do it doesn't really use any special buffers.

Mikulas

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Messages in current thread:
Re: LFENCE instruction (was: [rfc][patch 3/3] x86: optimise ..., Mikulas Patocka, (Tue Oct 16, 6:17 am)
Re: LFENCE instruction, H. Peter Anvin, (Tue Oct 16, 11:42 am)
Re: LFENCE instruction, Mikulas Patocka, (Tue Oct 16, 5:25 pm)