On Mon, 1 Oct 2007, Paul E. McKenney wrote:

quoted text
> That would indeed be one approach that CPU designers could take to
> avoid being careless or sadistic.  ;-)

That'd be the easier (unique maybe) approach too for them, from an silicon 
complexity POV. Distinguishing between different CPUs stores once inside a 
shared store buffer, would require tagging them in some way. That'd defeat 
most of the pros of having a shared store buffer ;)



- Davide


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