- More cleanups and bug fixes

- Use CLFLUSH in c_p_a(). This were the patches that caused some trouble

in -mm with X11, but it should be hopefully fixed now (we'll see)

- Report all IPIs in /proc/interrupts (useful e.g. to find out why

CPU isolation fails)

- Experimental patch to disable SVM for the clinical paranoid

- Dump the LER registers on Oopses by default (note that this is not 100%

reliable -- we know how to make it reliable, but that's not implemented yet)
Please review.
-Andi
-

Previously the data from before the exec was kept in there. Zero

them instead

Signed-off-by: Andi Kleen <ak@suse.de>
---

 arch/x86_64/ia32/ia32_aout.c |    2 ++

 1 file changed, 2 insertions(+)
Index: linux/arch/x86_64/ia32/ia32_aout.c

===================================================================

--- linux.orig/arch/x86_64/ia32/ia32_aout.c

+++ linux/arch/x86_64/ia32/ia32_aout.c

@@ -422,6 +422,8 @@ beyond_if:

 	(regs)->eflags = 0x200;

 	(regs)->cs = __USER32_CS;

 	(regs)->ss = __USER32_DS;

+	regs->r8 = regs->r9 = regs->r10 = regs->r11 =

+	regs->r12 = regs->r13 = regs->r14 = regs->r15 = 0;

 	set_fs(USER_DS);

 	if (unlikely(current->ptrace & PT_PTRACED)) {

 		if (current->ptrace & PT_TRACE_EXEC)

-

Not needed on modern systems without external FPU
TBD on i386 it is only needed for true 386s. Could remove it there

TBD for >= 486
Signed-off-by: Andi Kleen <ak@suse.de>
---

 arch/x86_64/kernel/setup.c |    2 --

 1 file changed, 2 deletions(-)
Index: linux/arch/x86_64/kernel/setup.c

===================================================================

--- linux.orig/arch/x86_64/kernel/setup.c

+++ linux/arch/x86_64/kernel/setup.c

@@ -121,8 +121,6 @@ struct resource standard_io_resources[]

 		.flags = IORESOURCE_BUSY | IORESOURCE_IO },

 	{ .name = "dma2", .start = 0xc0, .end = 0xdf,

 		.flags = IORESOURCE_BUSY | IORESOURCE_IO },

-	{ .name = "fpu", .start = 0xf0, .end = 0xff,

-		.flags = IORESOURCE_BUSY | IORESOURCE_IO }

 };
 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)

-

Since we are merging x86 and x86-64, I think it would be nice at least

to CC Thomas on patches that increase 32/64-bit differences...  because

won't this patch have to be partial un-done when we merge i386 and x86-64?
	Jeff
-

The patch has been dropped meanwhile BTW --  Maciej pointed
So far I still maintain i386 and x86-64. If Thomas wants to take both

over completely he can do that; but I won't bother handling any patches i didn't

write then anymore.
-Andi

-

What does that mean?
Didn't we all agree that x86 and x86-64 are going to be merged?
If yes, isn't it logical to avoid patches that extend the separation?
This is just basic playing-well-with-others fundamentals.
	Jeff
-

On Mon, 01 Oct 2007 07:30:12 -0400
No Andi is right - he didn't agree. He made it clear he didn't agree and

even at the kernel summit from what he said I'd assumed this meant from

2.6.24 we'd simply have a different maintainer team for x86-32/64.
We all (except Andi) agreed it was going to be merged and Andi made his

position clear - Thomas and Ingo just need to update the MAINTAINERS file

and get on with it.
Alan

-

I didn't agree no.
-Andi

-

It's called consensus.  Even Linus agreed to the merge.
So you are basically saying "fuck off" to the entire community?
Even in libata I have to listen to consensus, having just merged the

port multiplier support.
	Jeff
-

Thanks, Jeff!

-

From: Andrey Mirkin <major@openvz.org>
Right now register edi is just cleared before calling do_exit.

That is wrong because correct return value will be ignored.

Value from rax should be copied to rdi instead of clearing edi.
AK: changed to 32bit move because it's strictly an int
Signed-off-by: Andrey Mirkin <major@openvz.org>

Signed-off-by: Andi Kleen <ak@suse.de>
-----
---

 arch/x86_64/kernel/entry.S |    2 +-

 1 file changed, 1 insertion(+), 1 deletion(-)
Index: linux/arch/x86_64/kernel/entry.S

===================================================================

--- linux.orig/arch/x86_64/kernel/entry.S

+++ linux/arch/x86_64/kernel/entry.S

@@ -989,7 +989,7 @@ child_rip:

 	movq %rsi, %rdi

 	call *%rax

 	# exit

-	xorl %edi, %edi

+	mov %eax, %edi

 	call do_exit

 	CFI_ENDPROC

 ENDPROC(child_rip)

-

From: "Jan Beulich" <jbeulich@novell.com>

It doesn't seem to make sense to hide these, even if their counts

can't change at the point in time they're being displayed.
Signed-off-by: Jan Beulich <jbeulich@novell.com>

Signed-off-by: Andi Kleen <ak@suse.de>
 arch/i386/kernel/irq.c   |   18 ++++++++++++++----

 arch/x86_64/kernel/irq.c |   18 ++++++++++++++----

 2 files changed, 28 insertions(+), 8 deletions(-)
Index: linux/arch/i386/kernel/irq.c

===================================================================

--- linux.orig/arch/i386/kernel/irq.c

+++ linux/arch/i386/kernel/irq.c

@@ -259,9 +259,17 @@ int show_interrupts(struct seq_file *p,

 	}
 	if (i < NR_IRQS) {

+		unsigned any_count = 0;

+

 		spin_lock_irqsave(&irq_desc[i].lock, flags);

+#ifndef CONFIG_SMP

+		any_count = kstat_irqs(i);

+#else

+		for_each_online_cpu(j)

+			any_count |= kstat_cpu(j).irqs[i];

+#endif

 		action = irq_desc[i].action;

-		if (!action)

+		if (!action && !any_count)

 			goto skip;

 		seq_printf(p, "%3d: ",i);

 #ifndef CONFIG_SMP

@@ -272,10 +280,12 @@ int show_interrupts(struct seq_file *p,

 #endif

 		seq_printf(p, " %8s", irq_desc[i].chip->name);

 		seq_printf(p, "-%-8s", irq_desc[i].name);

-		seq_printf(p, "  %s", action->name);
-		for (action=action->next; action; action = action->next)

-			seq_printf(p, ", %s", action->name);

+		if (action) {

+			seq_printf(p, "  %s", action->name);

+			while ((action = action->next) != NULL)

+				seq_printf(p, ", %s", action->name);

+		}
 		seq_putc(p, '\n');

 skip:

Index: linux/arch/x86_64/kernel/irq.c

===================================================================

--- linux.orig/arch/x86_64/kernel/irq.c

+++ linux/arch/x86_64/kernel/irq.c

@@ -64,9 +64,17 @@ int show_interrupts(struct seq_file *p,

 	}
 	if (i < NR_IRQS) {

+		unsigned any_count = 0;

+

 		spin_lock_irqsave(&irq_desc[i].lock, flags);

+#ifndef CONFIG_SMP

+		any_count = kstat_irqs(i);

+#else

+...
[ message continues ]

From: "Jan Beulich" <jbeulich@novell.com>

One more of these issues (which were considered fixed a few releases

back): Other than on x86-64, i386 allows set_fixmap() to replace

already present mappings. Consequently, on PAE, care must be taken to

not update the high half of a pte while the low half is still holding

the old value.
Signed-off-by: Jan Beulich <jbeulich@novell.com>

Signed-off-by: Andi Kleen <ak@suse.de>
 arch/i386/mm/pgtable.c |    3 +--

 1 file changed, 1 insertion(+), 2 deletions(-)
Index: linux/arch/i386/mm/pgtable.c

===================================================================

--- linux.orig/arch/i386/mm/pgtable.c

+++ linux/arch/i386/mm/pgtable.c

@@ -97,8 +97,7 @@ static void set_pte_pfn(unsigned long va

 	}

 	pte = pte_offset_kernel(pmd, vaddr);

 	if (pgprot_val(flags))

-		/* <pfn,flags> stored as-is, to permit clearing entries */

-		set_pte(pte, pfn_pte(pfn, flags));

+		set_pte_present(&init_mm, vaddr, pte, pfn_pte(pfn, flags));

 	else

 		pte_clear(&init_mm, vaddr, pte);
-

From: Stefan Richter <stefanr@s5r6.in-berlin.de>

I don't know exactly what this option does...

Andi says it should be automatic rather than exposed as a prompt.
Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>

Signed-off-by: Andi Kleen <ak@suse.de>
---
---

 arch/x86_64/Kconfig |    3 ++-

 1 file changed, 2 insertions(+), 1 deletion(-)
Index: linux/arch/x86_64/Kconfig

===================================================================

--- linux.orig/arch/x86_64/Kconfig

+++ linux/arch/x86_64/Kconfig

@@ -469,8 +469,9 @@ config HPET_TIMER

 	  <http://www.intel.com/hardwaredesign/hpetspec.htm>.
 config HPET_EMULATE_RTC

-	bool "Provide RTC interrupt"

+	bool

 	depends on HPET_TIMER && RTC=y

+	default y
 # Mark as embedded because too many people got it wrong.

 # The code disables itself when not needed.

-

From: Rusty Russell <rusty@rustcorp.com.au>
This simplifies the io_apic.c __assign_irq_vector() logic and removes

the explicit SYSCALL_VECTOR check, and also allows for vectors to be

reserved by other mechanisms (ie. lguest).
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>

Signed-off-by: Andi Kleen <ak@suse.de>
---

 arch/i386/kernel/i8259.c   |    3 ++-

 arch/i386/kernel/io_apic.c |   13 ++++++++-----

 arch/i386/kernel/traps.c   |   10 ++++++++++

 include/asm-i386/irq.h     |    3 +++

 4 files changed, 23 insertions(+), 6 deletions(-)
===================================================================

Index: linux/arch/i386/kernel/i8259.c

===================================================================

--- linux.orig/arch/i386/kernel/i8259.c

+++ linux/arch/i386/kernel/i8259.c

@@ -400,7 +400,8 @@ void __init native_init_IRQ(void)

 		int vector = FIRST_EXTERNAL_VECTOR + i;

 		if (i >= NR_IRQS)

 			break;

-		if (vector != SYSCALL_VECTOR)

+		/* SYSCALL_VECTOR was reserved in trap_init. */

+		if (!test_bit(vector, used_vectors))

 			set_intr_gate(vector, interrupt[i]);

 	}
Index: linux/arch/i386/kernel/io_apic.c

===================================================================

--- linux.orig/arch/i386/kernel/io_apic.c

+++ linux/arch/i386/kernel/io_apic.c

@@ -1198,7 +1198,7 @@ static u8 irq_vector[NR_IRQ_VECTORS] __r

 static int __assign_irq_vector(int irq)

 {

 	static int current_vector = FIRST_DEVICE_VECTOR, current_offset = 0;

-	int vector, offset, i;

+	int vector, offset;
 	BUG_ON((unsigned)irq >= NR_IRQ_VECTORS);
@@ -1215,11 +1215,8 @@ next:

 	}

 	if (vector == current_vector)

 		return -ENOSPC;

-	if (vector == SYSCALL_VECTOR)

+	if (test_and_set_bit(vector, used_vectors))

 		goto next;

-	for (i = 0; i < NR_IRQ_VECTORS; i++)

-		if (irq_vector[i] == vector)

-			goto next;
 	current_vector = vector;

 	current_offset = offset;

@@ -2290,6 +2287,12 @@ static inline void __init check_timer(vo
 void __init setu...
[ message continues ]

From: "Jan Beulich" <jbeulich@novell.com>

Add support for and use the multi-byte NOPs recently documented to be

available on all PentiumPro and later processors.
This patch only applies cleanly on top of the "x86: misc.

constifications" patch sent earlier.
Signed-off-by: Jan Beulich <jbeulich@novell.com>

Signed-off-by: Andi Kleen <ak@suse.de>
 arch/i386/kernel/alternative.c |   23 ++++++++++++++++++++++-

 include/asm-i386/processor.h   |   22 ++++++++++++++++++++++

 include/asm-x86_64/processor.h |   22 ++++++++++++++++++++++

 3 files changed, 66 insertions(+), 1 deletion(-)
Index: linux/arch/i386/kernel/alternative.c

===================================================================

--- linux.orig/arch/i386/kernel/alternative.c

+++ linux/arch/i386/kernel/alternative.c

@@ -115,12 +115,31 @@ static const unsigned char *const k7_nop

 };

 #endif
+#ifdef P6_NOP1

+asm("\t.section .rodata, \"a\"\np6nops: "

+	P6_NOP1 P6_NOP2 P6_NOP3 P6_NOP4 P6_NOP5 P6_NOP6

+	P6_NOP7 P6_NOP8);

+extern const unsigned char p6nops[];

+static const unsigned char *const p6_nops[ASM_NOP_MAX+1] = {

+	NULL,

+	p6nops,

+	p6nops + 1,

+	p6nops + 1 + 2,

+	p6nops + 1 + 2 + 3,

+	p6nops + 1 + 2 + 3 + 4,

+	p6nops + 1 + 2 + 3 + 4 + 5,

+	p6nops + 1 + 2 + 3 + 4 + 5 + 6,

+	p6nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,

+};

+#endif

+

 #ifdef CONFIG_X86_64
 extern char __vsyscall_0;

 static inline const unsigned char*const * find_nop_table(void)

 {

-	return k8_nops;

+	return boot_cpu_data.x86_vendor != X86_VENDOR_INTEL ||

+	       boot_cpu_data.x86 < 6 ? k8_nops : p6_nops;

 }
 #else /* CONFIG_X86_64 */

@@ -131,6 +150,8 @@ static const struct nop {

 } noptypes[] = {

 	{ X86_FEATURE_K8, k8_nops },

 	{ X86_FEATURE_K7, k7_nops },

+	{ X86_FEATURE_P4, p6_nops },

+	{ X86_FEATURE_P3, p6_nops },

 	{ -1, NULL }

 };
Index: linux/include/asm-i386/processor.h

===================================================================

--- linux.orig/include/asm-i386/processor.h

+++ linux/includ...
[ message continues ]

From: "Jan Beulich" <jbeulich@novell.com>

.. as they're, with a single exception, never written to.
Signed-off-by: Jan Beulich <jbeulich@novell.com>

Signed-off-by: Andi Kleen <ak@suse.de>
 arch/i386/kernel/cpu/perfctr-watchdog.c |   14 ++++++++------

 1 file changed, 8 insertions(+), 6 deletions(-)
Index: linux/arch/i386/kernel/cpu/perfctr-watchdog.c

===================================================================

--- linux.orig/arch/i386/kernel/cpu/perfctr-watchdog.c

+++ linux/arch/i386/kernel/cpu/perfctr-watchdog.c

@@ -34,7 +34,7 @@ struct wd_ops {

 	u64 checkbit;

 };
-static struct wd_ops *wd_ops;

+static const struct wd_ops *wd_ops;
 /* this number is calculated from Intel's MSR_P4_CRU_ESCR5 register and it's

  * offset from MSR_P4_BSU_ESCR0.  It will be the max for all platforms (for now)

@@ -325,7 +325,7 @@ static void single_msr_rearm(struct nmi_

 	write_watchdog_counter(wd->perfctr_msr, NULL, nmi_hz);

 }
-static struct wd_ops k7_wd_ops = {

+static const struct wd_ops k7_wd_ops = {

 	.reserve = single_msr_reserve,

 	.unreserve = single_msr_unreserve,

 	.setup = setup_k7_watchdog,

@@ -388,7 +388,7 @@ static void p6_rearm(struct nmi_watchdog

 	write_watchdog_counter32(wd->perfctr_msr, NULL,nmi_hz);

 }
-static struct wd_ops p6_wd_ops = {

+static const struct wd_ops p6_wd_ops = {

 	.reserve = single_msr_reserve,

 	.unreserve = single_msr_unreserve,

 	.setup = setup_p6_watchdog,

@@ -540,7 +540,7 @@ static void p4_rearm(struct nmi_watchdog

 	write_watchdog_counter(wd->perfctr_msr, NULL, nmi_hz);

 }
-static struct wd_ops p4_wd_ops = {

+static const struct wd_ops p4_wd_ops = {

 	.reserve = p4_reserve,

 	.unreserve = p4_unreserve,

 	.setup = setup_p4_watchdog,

@@ -558,6 +558,8 @@ static struct wd_ops p4_wd_ops = {

 #define ARCH_PERFMON_NMI_EVENT_SEL	ARCH_PERFMON_UNHALTED_CORE_CYCLES_SEL

 #define ARCH_PERFMON_NMI_EVENT_UMASK	ARCH_PERFMON_UNHALTED_CORE_CYCLES_UMASK
+static struct wd_ops intel_arch_wd_ops;

+

 static i...
[ message continues ]

From: Sam Ravnborg <sam@ravnborg.org>

Fix following section mismatch warning:

WARNING: vmlinux.o(.text+0xc88c): Section mismatch: reference to .init.text:trap_init_f00f_bug (between 'init_intel' and 'cpuid4_cache_lookup')
init_intel are __cpuint where trap_init_f00f_bug is __init.

Fixed by declaring trap_init_f00f_bug __cpuinit.
Moved the defintion of trap_init_f00f_bug to the sole user in init.c

so the ugly prototype in intel.c could get killed.
Frank van Maarseveen <frankvm@frankvm.com> supplied the .config used

to reproduce the warning.
Cc: Frank van Maarseveen <frankvm@frankvm.com>

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>

Signed-off-by: Andi Kleen <ak@suse.de>
---

---

 arch/i386/kernel/cpu/intel.c |   17 +++++++++++++++--

 arch/i386/kernel/traps.c     |   14 --------------

 2 files changed, 15 insertions(+), 16 deletions(-)
Index: linux/arch/i386/kernel/cpu/intel.c

===================================================================

--- linux.orig/arch/i386/kernel/cpu/intel.c

+++ linux/arch/i386/kernel/cpu/intel.c

@@ -8,6 +8,7 @@

 #include <linux/module.h>
 #include <asm/processor.h>

+#include <asm/pgtable.h>

 #include <asm/msr.h>

 #include <asm/uaccess.h>
@@ -19,8 +20,6 @@

 #include <mach_apic.h>

 #endif
-extern int trap_init_f00f_bug(void);

-

 #ifdef CONFIG_X86_INTEL_USERCOPY

 /*

  * Alignment at which movsl is preferred for bulk memory copies.

@@ -95,6 +94,20 @@ static int __cpuinit num_cpu_cores(struc

 		return 1;

 }
+#ifdef CONFIG_X86_F00F_BUG

+static void __cpuinit trap_init_f00f_bug(void)

+{

+	__set_fixmap(FIX_F00F_IDT, __pa(&idt_table), PAGE_KERNEL_RO);

+

+	/*

+	 * Update the IDT descriptor and reload the IDT so that

+	 * it uses the read-only mapped virtual address.

+	 */

+	idt_descr.address = fix_to_virt(FIX_F00F_IDT);

+	load_idt(&idt_descr);

+}

+#endif

+

 static void __cpuinit init_intel(struct cpuinfo_x86 *c)

 {

 	unsigned int l2 = 0;

Index...
[ message continues ]

From: Satyam Sharma <satyam@infradead.org>
Fix bugzilla #8679
WARNING: arch/i386/kernel/built-in.o(.data+0x2148): Section mismatch: reference

to .init.text: (between 'thermal_throttle_cpu_notifier' and 'mtrr_mutex')
comes because struct notifier_block thermal_throttle_cpu_notifier in

arch/i386/kernel/cpu/mcheck/therm_throt.c goes in .data section but the

notifier callback function itself has been marked __cpuinit which becomes

__init == .init.text when HOTPLUG_CPU=n.  The warning is bogus because the

callback will never be called out if HOTPLUG_CPU=n in the first place (as

one can see from kernel/cpu.c, the cpu_chain itself is __cpuinitdata :-)
So, let's mark thermal_throttle_cpu_notifier as __cpuinitdata to fix

the section mismatch warning.
Signed-off-by: Satyam Sharma <satyam@infradead.org>

Signed-off-by: Andrew Morton <akpm@linux-foundation.org>

Signed-off-by: Andi Kleen <ak@suse.de>
---
 arch/i386/kernel/cpu/mcheck/therm_throt.c |    2 +-

 1 file changed, 1 insertion(+), 1 deletion(-)
Index: linux/arch/i386/kernel/cpu/mcheck/therm_throt.c

===================================================================

--- linux.orig/arch/i386/kernel/cpu/mcheck/therm_throt.c

+++ linux/arch/i386/kernel/cpu/mcheck/therm_throt.c

@@ -152,7 +152,7 @@ static __cpuinit int thermal_throttle_cp

 	return NOTIFY_OK;

 }
-static struct notifier_block thermal_throttle_cpu_notifier =

+static struct notifier_block thermal_throttle_cpu_notifier __cpuinitdata =

 {

 	.notifier_call = thermal_throttle_cpu_callback,

 };

-

From: Akinobu Mita <akinobu.mita@gmail.com>
Do cpuid_device_create() in CPU_UP_PREPARE instead of CPU_ONLINE.
Cc: "H. Peter Anvin" <hpa@zytor.com>

Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>

Signed-off-by: Andi Kleen <ak@suse.de>

Cc: Gautham R Shenoy <ego@in.ibm.com>

Cc: Oleg Nesterov <oleg@tv-sign.ru>

Signed-off-by: Andrew Morton <akpm@linux-foundation.org>

---
 arch/i386/kernel/cpuid.c |   32 +++++++++++++++++++-------------

 1 file changed, 19 insertions(+), 13 deletions(-)
Index: linux/arch/i386/kernel/cpuid.c

===================================================================

--- linux.orig/arch/i386/kernel/cpuid.c

+++ linux/arch/i386/kernel/cpuid.c

@@ -136,15 +136,18 @@ static const struct file_operations cpui

 	.open = cpuid_open,

 };
-static int __cpuinit cpuid_device_create(int i)

+static int cpuid_device_create(int cpu)

 {

-	int err = 0;

 	struct device *dev;
-	dev = device_create(cpuid_class, NULL, MKDEV(CPUID_MAJOR, i), "cpu%d",i);

-	if (IS_ERR(dev))

-		err = PTR_ERR(dev);

-	return err;

+	dev = device_create(cpuid_class, NULL, MKDEV(CPUID_MAJOR, cpu),

+			    "cpu%d", cpu);

+	return IS_ERR(dev) ? PTR_ERR(dev) : 0;

+}

+

+static void cpuid_device_destroy(int cpu)

+{

+	device_destroy(cpuid_class, MKDEV(CPUID_MAJOR, cpu));

 }
 static int __cpuinit cpuid_class_cpu_callback(struct notifier_block *nfb,

@@ -152,18 +155,21 @@ static int __cpuinit cpuid_class_cpu_cal

 					      void *hcpu)

 {

 	unsigned int cpu = (unsigned long)hcpu;

+	int err = 0;
 	switch (action) {

-	case CPU_ONLINE:

-	case CPU_ONLINE_FROZEN:

-		cpuid_device_create(cpu);

+	case CPU_UP_PREPARE:

+	case CPU_UP_PREPARE_FROZEN:

+		err = cpuid_device_create(cpu);

 		break;

+	case CPU_UP_CANCELED:

+	case CPU_UP_CANCELED_FROZEN:

 	case CPU_DEAD:

 	case CPU_DEAD_FROZEN:

-		device_destroy(cpuid_class, MKDEV(CPUID_MAJOR, cpu));

+		cpuid_device_destroy(cpu);

 		break;

 	}

-	return NOTIFY_OK;

+	return err ? NOTIFY_BAD : NOT...
[ message continues ]

__cpuinit please
Thanks,
	tglx
-

Yes. This eliminates earlier patch in this series.

([22/50] i386: Misc cpuinit annotation)

-

No, it's even worse:
#22 is applied before #35.

#35 is reverting the __cpuinit anotation of #22 with its modificiations

of cpuid_device_create()
	tglx
-

From: "Siddha, Suresh B" <suresh.b.siddha@intel.com>
Fix get_apic_id() in mach-default, so that it uses 8 bits incase of xAPIC case

and 4 bits for legacy APIC case.
This fixes the i386 kernel assumption that apic id is less than 16 for xAPIC

platforms with 8 cpus or less and makes the kernel boot on such platforms.
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>

Signed-off-by: Andi Kleen <ak@suse.de>

Cc: Andi Kleen <ak@suse.de>

Cc: Andrew Morton <akpm@linux-foundation.org>

Signed-off-by: Andrew Morton <akpm@linux-foundation.org>

---
 include/asm-i386/mach-default/mach_apicdef.h |    8 +++++++-

 1 file changed, 7 insertions(+), 1 deletion(-)
Index: linux/include/asm-i386/mach-default/mach_apicdef.h

===================================================================

--- linux.orig/include/asm-i386/mach-default/mach_apicdef.h

+++ linux/include/asm-i386/mach-default/mach_apicdef.h

@@ -1,11 +1,17 @@

 #ifndef __ASM_MACH_APICDEF_H

 #define __ASM_MACH_APICDEF_H
+#include <asm/apic.h>

+

 #define		APIC_ID_MASK		(0xF<<24)
 static inline unsigned get_apic_id(unsigned long x)

 {

-	return (((x)>>24)&0xF);

+	unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR));

+	if (APIC_XAPIC(ver))

+		return (((x)>>24)&0xFF);

+	else

+		return (((x)>>24)&0xF);

 } 
 #define		GET_APIC_ID(x)	get_apic_id(x)

-

From: Andrew Hastings <abh@cray.com>

Fix an off-by-one error in find_next_zero_string which prevents

allocating the last bit.
Signed-off-by: Andrew Hastings <abh@cray.com> on behalf of Cray Inc.

Signed-off-by: Andi Kleen <ak@suse.de>
---

 arch/x86_64/lib/bitstr.c |    2 +-

 1 file changed, 1 insertion(+), 1 deletion(-)
Index: linux/arch/x86_64/lib/bitstr.c

===================================================================

--- linux.orig/arch/x86_64/lib/bitstr.c

+++ linux/arch/x86_64/lib/bitstr.c

@@ -14,7 +14,7 @@ find_next_zero_string(unsigned long *bit
 	/* could test bitsliced, but it's hardly worth it */

 	end = n+len;

-	if (end >= nbits)

+	if (end > nbits)

 		return -1;

 	for (i = n+1; i < end; i++) {

 		if (test_bit(i, bitmap)) {

-

Don't want any lockdep or other fragile machinery to run during oopses.

Use raw spinlocks directly for oops locking.

Also disables irq flag tracing there.
Signed-off-by: Andi Kleen <ak@suse.de>
---

 arch/i386/kernel/traps.c   |   12 +++++++-----

 arch/x86_64/kernel/traps.c |   17 ++++++++---------

 2 files changed, 15 insertions(+), 14 deletions(-)
Index: linux/arch/i386/kernel/traps.c

===================================================================

--- linux.orig/arch/i386/kernel/traps.c

+++ linux/arch/i386/kernel/traps.c

@@ -447,11 +447,11 @@ void ler_enable(void) {

 void die(const char * str, struct pt_regs * regs, long err)

 {

 	static struct {

-		spinlock_t lock;

+		raw_spinlock_t lock;

 		u32 lock_owner;

 		int lock_owner_depth;

 	} die = {

-		.lock =			__SPIN_LOCK_UNLOCKED(die.lock),

+		.lock =			__RAW_SPIN_LOCK_UNLOCKED,

 		.lock_owner =		-1,

 		.lock_owner_depth =	0

 	};

@@ -462,13 +462,14 @@ void die(const char * str, struct pt_reg
 	if (die.lock_owner != raw_smp_processor_id()) {

 		console_verbose();

-		spin_lock_irqsave(&die.lock, flags);

+		__raw_spin_lock(&die.lock);

+		raw_local_save_flags(flags);

 		die.lock_owner = smp_processor_id();

 		die.lock_owner_depth = 0;

 		bust_spinlocks(1);

 	}

 	else

-		local_save_flags(flags);

+		raw_local_save_flags(flags);
 	if (++die.lock_owner_depth < 3) {

 		unsigned long esp;

@@ -511,7 +512,8 @@ void die(const char * str, struct pt_reg

 	bust_spinlocks(0);

 	die.lock_owner = -1;

 	add_taint(TAINT_DIE);

-	spin_unlock_irqrestore(&die.lock, flags);

+	__raw_spin_unlock(&die.lock);

+	raw_local_irq_restore(flags);
 	if (!regs)

 		return;

Index: linux/arch/x86_64/kernel/traps.c

===================================================================

--- linux.orig/arch/x86_64/kernel/traps.c

+++ linux/arch/x86_64/kernel/traps.c

@@ -556,7 +556,7 @@ void ler_enable(void) {

 	}

 }
-static DEFINE_SPINLOCK(die_lock);

+static raw_spinlock_t die_lock = __RAW_SPIN_LOCK_UNLOCKE...
[ message continues ]

Move the = into the __setup line.

Document the option in kernel-parameters.txt by adding a pointer

to the x86-64 specific documentation.
Pointed out by Robert Day

Signed-off-by: Andi Kleen <ak@suse.de>
---

 Documentation/kernel-parameters.txt |    2 ++

 arch/x86_64/kernel/mce.c            |    4 +---

 2 files changed, 3 insertions(+), 3 deletions(-)
Index: linux/Documentation/kernel-parameters.txt

===================================================================

--- linux.orig/Documentation/kernel-parameters.txt

+++ linux/Documentation/kernel-parameters.txt

@@ -970,6 +970,8 @@ and is between 256 and 4096 characters. 
 	mce		[X86-32] Machine Check Exception
+	mce=option	[X86-64] See Documentation/x86-64/boot-options.txt

+

 	md=		[HW] RAID subsystems devices and level

 			See Documentation/md.txt.
Index: linux/arch/x86_64/kernel/mce.c

===================================================================

--- linux.orig/arch/x86_64/kernel/mce.c

+++ linux/arch/x86_64/kernel/mce.c

@@ -699,8 +699,6 @@ static int __init mcheck_disable(char *s

    mce=nobootlog Don't log MCEs from before booting. */

 static int __init mcheck_enable(char *str)

 {

-	if (*str == '=')

-		str++;

 	if (!strcmp(str, "off"))

 		mce_dont_init = 1;

 	else if (!strcmp(str, "bootlog") || !strcmp(str,"nobootlog"))

@@ -713,7 +711,7 @@ static int __init mcheck_enable(char *st

 }
 __setup("nomce", mcheck_disable);

-__setup("mce", mcheck_enable);

+__setup("mce=", mcheck_enable);
 /*

  * Sysfs support

-

From: Satyam Sharma <satyam@infradead.org>
These build warnings:
In file included from include/asm/thread_info.h:16,

from include/linux/thread_info.h:21,

from include/linux/preempt.h:9,

from include/linux/spinlock.h:49,

from include/linux/vmalloc.h:4,

from arch/i386/boot/compressed/misc.c:14:

include/asm/processor.h: In function $B!F(Jcpuid_count$B!G(J:

include/asm/processor.h:615: warning: pointer targets in passing argument 1 of $B!F(Jnative_cpuid$B!G(J differ in signedness

include/asm/processor.h:615: warning: pointer targets in passing argument 2 of $B!F(Jnative_cpuid$B!G(J differ in signedness

include/asm/processor.h:615: warning: pointer targets in passing argument 3 of $B!F(Jnative_cpuid$B!G(J differ in signedness

include/asm/processor.h:615: warning: pointer targets in passing argument 4 of $B!F(Jnative_cpuid$B!G(J differ in signedness
come because the arguments have been specified as pointers to (signed) int

types, not unsigned. So let's specify those as unsigned. Do some codingstyle

here and there while at it.
Signed-off-by: Satyam Sharma <satyam@infradead.org>

Signed-off-by: Andi Kleen <ak@suse.de>
---
 include/asm-i386/processor.h |    9 ++++++---

 1 file changed, 6 insertions(+), 3 deletions(-)
Index: linux/include/asm-i386/processor.h

===================================================================

--- linux.orig/include/asm-i386/processor.h

+++ linux/include/asm-i386/processor.h

@@ -595,7 +595,9 @@ static inline void load_esp0(struct tss_

  * clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx

  * resulting in stale register contents being returned.

  */

-static inline void cpuid(unsigned int op, unsigned int *eax, unsigned int *ebx, unsigned int *ecx, unsigned int *edx)

+static inline void cpuid(unsigned int op,

+			 unsigned int *eax, unsigned int *ebx,

+			 unsigned int *ecx, unsigned int *edx)

 {

 	*eax = op;

 	*ecx = 0;

@@ -603,8 +605,9 @@ static inline void cpuid(unsigned int op

 }
...
[ message continues ]

Hi,
                ^^^^^^^^^^            ^^^^^^^^^^
Yikes. My bad, I had faulty (default) alpine settings (and a sad

combination of LANG=en_US.UTF-8) when I made and sent out that patch.

Please ensure that this finally gets committed in a somewhat saner and

more readable state to the tree.
Thanks,
Satyam

-

I am not too thrilled about gcc using non-ascii for interpunctuation

(for Western languages)..

-

Ack.  I usually build with "LC_ALL=C" to make those readable.
---

~Randy

*** Remember to use Documentation/SubmitChecklist when testing your code ***

-

.i is an ending used for preprocessed stuff.
This patch therefore renames assembler include files to .h and guards

the contents with an #ifdef __ASSEMBLY__.
Signed-off-by: Adrian Bunk <bunk@kernel.org>

Signed-off-by: Andi Kleen <ak@suse.de>
---
 arch/i386/lib/semaphore.S            |    4 ++--

 arch/x86_64/lib/rwlock.S             |    2 +-

 include/asm-i386/alternative-asm.h   |   16 ++++++++++++++++

 include/asm-i386/alternative-asm.i   |   12 ------------

 include/asm-i386/frame.h             |   27 +++++++++++++++++++++++++++

 include/asm-i386/frame.i             |   23 -----------------------

 include/asm-um/alternative-asm.h     |    6 ++++++

 include/asm-um/alternative-asm.i     |    6 ------

 include/asm-um/frame.h               |    6 ++++++

 include/asm-um/frame.i               |    6 ------

 include/asm-x86_64/alternative-asm.h |   16 ++++++++++++++++

 include/asm-x86_64/alternative-asm.i |   12 ------------

 12 files changed, 74 insertions(+), 62 deletions(-)
7b64536780b39820b13bebd144983c3c8c9ae64c

Index: linux/arch/i386/lib/semaphore.S

===================================================================

--- linux.orig/arch/i386/lib/semaphore.S

+++ linux/arch/i386/lib/semaphore.S

@@ -15,8 +15,8 @@
 #include <linux/linkage.h>

 #include <asm/rwlock.h>

-#include <asm/alternative-asm.i>

-#include <asm/frame.i>

+#include <asm/alternative-asm.h>

+#include <asm/frame.h>

 #include <asm/dwarf2.h>
 /*

Index: linux/arch/x86_64/lib/rwlock.S

===================================================================

--- linux.orig/arch/x86_64/lib/rwlock.S

+++ linux/arch/x86_64/lib/rwlock.S

@@ -2,7 +2,7 @@
 #include <linux/linkage.h>

 #include <asm/rwlock.h>

-#include <asm/alternative-asm.i>

+#include <asm/alternative-asm.h>

 #include <asm/dwarf2.h>
 /* rdi:	pointer to rwlock_t */

Index: linux/include/asm-i386/alternative-asm.h

===========================================...
[ message continues ]

From: "Jan Beulich" <jbeulich@novell.com>

.. when dumping register state. This is particularly useful when gcc

managed to tail-call optimize an indirect call which happens to hit a

NULL (or otherwise invalid) pointer.
The result is unreliable because interrupts happening inbetween can mess

it up
AK: added some warnings that the result can be unreliable
Signed-off-by: Jan Beulich <jbeulich@novell.com>

Signed-off-by: Andi Kleen <ak@suse.de>
 Documentation/kernel-parameters.txt |    3 +++

 arch/i386/kernel/cpu/amd.c          |    4 ++++

 arch/i386/kernel/cpu/common.c       |    2 ++

 arch/i386/kernel/cpu/intel.c        |   20 ++++++++++++++------

 arch/i386/kernel/traps.c            |   35 +++++++++++++++++++++++++++++++++++

 arch/x86_64/kernel/setup.c          |   23 ++++++++++++++++++-----

 arch/x86_64/kernel/traps.c          |   33 +++++++++++++++++++++++++++++++++

 include/asm-i386/msr-index.h        |    3 +++

 include/asm-i386/processor.h        |    4 ++++

 include/asm-x86_64/msr.h            |    6 ++++++

 include/asm-x86_64/processor.h      |    3 +++

 11 files changed, 125 insertions(+), 11 deletions(-)
Index: linux/Documentation/kernel-parameters.txt

===================================================================

--- linux.orig/Documentation/kernel-parameters.txt

+++ linux/Documentation/kernel-parameters.txt

@@ -1152,6 +1152,9 @@ and is between 256 and 4096 characters. 
 	nolapic_timer	[X86-32,APIC] Do not use the local APIC timer.
+	noler		[X86-32/X86-64] Do not print last exception records

+			with kernel register dumps.

+

 	noltlbs		[PPC] Do not use large page/tlb entries for kernel

 			lowmem mapping on PPC40x.
Index: linux/arch/i386/kernel/cpu/amd.c

===================================================================

--- linux.orig/arch/i386/kernel/cpu/amd.c

+++ linux/arch/i386/kernel/cpu/amd.c

@@ -238,9 +238,13 @@ static void __cpuinit init_amd(struct cp

 	case 0x10:

 	case 0x11:

 		set_bit(X86_FEATURE_K8, c->x86_cap...
[ message continues ]

From: "Jan Beulich" <jbeulich@novell.com>

If a debugger or other low level code resolves a kernel exception, don't

send signals, kill the kernel, or do anything the like.
Signed-off-by: Jan Beulich <jbeulich@novell.com>

Signed-off-by: Andi Kleen <ak@suse.de>
 arch/x86_64/kernel/mce.c    |    7 ++++---

 arch/x86_64/kernel/traps.c  |   23 +++++++++++++++--------

 arch/x86_64/mm/fault.c      |   12 ++++++------

 include/asm-x86_64/kdebug.h |    4 ++--

 4 files changed, 27 insertions(+), 19 deletions(-)
Index: linux/arch/x86_64/kernel/mce.c

===================================================================

--- linux.orig/arch/x86_64/kernel/mce.c

+++ linux/arch/x86_64/kernel/mce.c

@@ -196,9 +196,10 @@ void do_machine_check(struct pt_regs * r
 	atomic_inc(&mce_entry);
-	if (regs)

-		notify_die(DIE_NMI, "machine check", regs, error_code, 18, SIGKILL);

-	if (!banks)

+	if ((regs

+	     && notify_die(DIE_NMI, "machine check", regs, error_code,

+			   18, SIGKILL) == NOTIFY_STOP)

+	    || !banks)

 		goto out2;
 	memset(&m, 0, sizeof(struct mce));

Index: linux/arch/x86_64/kernel/traps.c

===================================================================

--- linux.orig/arch/x86_64/kernel/traps.c

+++ linux/arch/x86_64/kernel/traps.c

@@ -557,7 +557,7 @@ unsigned __kprobes long oops_begin(void)

 	return flags;

 }
-void __kprobes oops_end(unsigned long flags)

+void __kprobes oops_end(unsigned long flags, struct pt_regs *regs, int signr)

 {

 	die_owner = -1;

 	bust_spinlocks(0);

@@ -568,12 +568,17 @@ void __kprobes oops_end(unsigned long fl

 	else

 		/* Nest count reaches zero, release the lock. */

 		spin_unlock_irqrestore(&die_lock, flags);

+	if (!regs) {

+		oops_exit();

+		return;

+	}

 	if (panic_on_oops)

 		panic("Fatal exception");

 	oops_exit();

+	do_exit(signr);

 }
-void __kprobes __die(const char * str, struct pt_regs * regs, long err)

+int __kprobes __die(const char * str, struct pt_regs * regs, long err)

 {

...
[ message continues ]

80 chars please.
	tglx
-

From: "Jan Beulich" <jbeulich@novell.com>

Signed-off-by: Jan Beulich <jbeulich@novell.com>

Signed-off-by: Andi Kleen <ak@suse.de>
 arch/x86_64/kernel/entry.S |    4 ----

 arch/x86_64/kernel/traps.c |    3 ---

 2 files changed, 7 deletions(-)
Index: linux/arch/x86_64/kernel/entry.S

===================================================================

--- linux.orig/arch/x86_64/kernel/entry.S

+++ linux/arch/x86_64/kernel/entry.S

@@ -1088,10 +1088,6 @@ ENTRY(coprocessor_segment_overrun)

 	zeroentry do_coprocessor_segment_overrun

 END(coprocessor_segment_overrun)
-ENTRY(reserved)

-	zeroentry do_reserved

-END(reserved)

-

 	/* runs on exception stack */

 ENTRY(double_fault)

 	XCPT_FRAME

Index: linux/arch/x86_64/kernel/traps.c

===================================================================

--- linux.orig/arch/x86_64/kernel/traps.c

+++ linux/arch/x86_64/kernel/traps.c

@@ -70,7 +70,6 @@ asmlinkage void general_protection(void)

 asmlinkage void page_fault(void);

 asmlinkage void coprocessor_error(void);

 asmlinkage void simd_coprocessor_error(void);

-asmlinkage void reserved(void);

 asmlinkage void alignment_check(void);

 asmlinkage void machine_check(void);

 asmlinkage void spurious_interrupt_bug(void);

@@ -710,12 +709,10 @@ DO_ERROR_INFO( 0, SIGFPE,  "divide error

 DO_ERROR( 4, SIGSEGV, "overflow", overflow)

 DO_ERROR( 5, SIGSEGV, "bounds", bounds)

 DO_ERROR_INFO( 6, SIGILL,  "invalid opcode", invalid_op, ILL_ILLOPN, regs->rip)

-DO_ERROR( 7, SIGSEGV, "device not available", device_not_available)

 DO_ERROR( 9, SIGFPE,  "coprocessor segment overrun", coprocessor_segment_overrun)

 DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS)

 DO_ERROR(11, SIGBUS,  "segment not present", segment_not_present)

 DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, 0)

-DO_ERROR(18, SIGSEGV, "reserved", reserved)
 /* Runs on IST stack */

 asmlinkage void do_stack_segment(struct pt_regs *regs, long error_code)

-

From: "Jan Beulich" <jbeulich@novell.com>

Signed-off-by: Jan Beulich <jbeulich@novell.com>

Signed-off-by: Andi Kleen <ak@suse.de>
 arch/i386/mm/fault.c   |    3 ++-

 arch/x86_64/mm/fault.c |    2 +-

 2 files changed, 3 insertions(+), 2 deletions(-)
Index: linux/arch/i386/mm/fault.c

===================================================================

--- linux.orig/arch/i386/mm/fault.c

+++ linux/arch/i386/mm/fault.c

@@ -569,7 +569,8 @@ no_context:

 		 * it's allocated already.

 		 */

 		if ((page >> PAGE_SHIFT) < max_low_pfn

-		    && (page & _PAGE_PRESENT)) {

+		    && (page & _PAGE_PRESENT)

+		    && !(page & _PAGE_PSE)) {

 			page &= PAGE_MASK;

 			page = ((__typeof__(page) *) __va(page))[(address >> PAGE_SHIFT)

 			                                         & (PTRS_PER_PTE - 1)];

Index: linux/arch/x86_64/mm/fault.c

===================================================================

--- linux.orig/arch/x86_64/mm/fault.c

+++ linux/arch/x86_64/mm/fault.c

@@ -175,7 +175,7 @@ void dump_pagetable(unsigned long addres

 	pmd = pmd_offset(pud, address);

 	if (bad_address(pmd)) goto bad;

 	printk("PMD %lx ", pmd_val(*pmd));

-	if (!pmd_present(*pmd))	goto ret;

+	if (!pmd_present(*pmd) || pmd_large(*pmd)) goto ret;
 	pte = pte_offset_kernel(pmd, address);

 	if (bad_address(pte)) goto bad;

-

From: "Jan Beulich" <jbeulich@novell.com>

.. and handle use of the x86-64 file by make logic instead.
Signed-off-by: Jan Beulich <jbeulich@novell.com>

Signed-off-by: Andi Kleen <ak@suse.de>
 arch/i386/kernel/Makefile       |    1 +

 arch/i386/kernel/early_printk.c |    2 --

 2 files changed, 1 insertion(+), 2 deletions(-)
Index: linux/arch/i386/kernel/Makefile

===================================================================

--- linux.orig/arch/i386/kernel/Makefile

+++ linux/arch/i386/kernel/Makefile

@@ -86,6 +86,7 @@ $(obj)/vsyscall-syms.o: $(src)/vsyscall.

 			$(obj)/vsyscall-sysenter.o $(obj)/vsyscall-note.o FORCE

 	$(call if_changed,syscall)
+early_printk-y            += ../../x86_64/kernel/early_printk.o

 k8-y                      += ../../x86_64/kernel/k8.o

 stacktrace-y		  += ../../x86_64/kernel/stacktrace.o

 early-quirks-y		  += ../../x86_64/kernel/early-quirks.o

Index: linux/arch/i386/kernel/early_printk.c

===================================================================

--- linux.orig/arch/i386/kernel/early_printk.c

+++ /dev/null

@@ -1,2 +0,0 @@

-

-#include "../../x86_64/kernel/early_printk.c"

-

Spotted by Chuck Ebbert
Signed-off-by: Andi Kleen <ak@suse.de>
---

 arch/x86_64/kernel/vsyscall.c |    1 -

 1 file changed, 1 deletion(-)
Index: linux/arch/x86_64/kernel/vsyscall.c

===================================================================

--- linux.orig/arch/x86_64/kernel/vsyscall.c

+++ linux/arch/x86_64/kernel/vsyscall.c

@@ -80,7 +80,6 @@ void update_vsyscall(struct timespec *wa

 	vsyscall_gtod_data.wall_time_sec = wall_time->tv_sec;

 	vsyscall_gtod_data.wall_time_nsec = wall_time->tv_nsec;

 	vsyscall_gtod_data.sys_tz = sys_tz;

-	vsyscall_gtod_data.wall_time_nsec = wall_time->tv_nsec;

 	vsyscall_gtod_data.wall_to_monotonic = wall_to_monotonic;

 	write_sequnlock_irqrestore(&vsyscall_gtod_data.lock, flags);

 }

-

From: Laurent Vivier <Laurent.Vivier@bull.net>
This patch export i386 smp_call_function_mask() with EXPORT_SYMBOL().
This function is needed by KVM to call a function on a set of CPUs.
 arch/i386/kernel/smp.c |    7 +++++++

 include/asm-i386/smp.h |    9 +++------

 2 files changed, 10 insertions(+), 6 deletions(-)
Signed-off-by: Laurent Vivier <Laurent.Vivier@bull.net>
Index: linux/arch/i386/kernel/smp.c

===================================================================

--- linux.orig/arch/i386/kernel/smp.c

+++ linux/arch/i386/kernel/smp.c

@@ -708,3 +708,10 @@ struct smp_ops smp_ops = {

 	.smp_send_reschedule = native_smp_send_reschedule,

 	.smp_call_function_mask = native_smp_call_function_mask,

 };

+

+int smp_call_function_mask(cpumask_t mask, void (*func) (void *info),

+			   void *info, int wait)

+{

+	return smp_ops.smp_call_function_mask(mask, func, info, wait);

+}

+EXPORT_SYMBOL(smp_call_function_mask);

Index: linux/include/asm-i386/smp.h

===================================================================

--- linux.orig/include/asm-i386/smp.h

+++ linux/include/asm-i386/smp.h

@@ -92,12 +92,9 @@ static inline void smp_send_reschedule(i

 {

 	smp_ops.smp_send_reschedule(cpu);

 }

-static inline int smp_call_function_mask(cpumask_t mask,

-					 void (*func) (void *info), void *info,

-					 int wait)

-{

-	return smp_ops.smp_call_function_mask(mask, func, info, wait);

-}

+extern int smp_call_function_mask(cpumask_t mask,

+				  void (*func) (void *info), void *info,

+				  int wait);
 void native_smp_prepare_boot_cpu(void);

 void native_smp_prepare_cpus(unsigned int max_cpus);

-

From: Laurent Vivier <Laurent.Vivier@bull.net>
This patch defines the missing function smp_call_function_mask() for x86_64,

this is more or less a cut&paste of i386 function. It removes also some

duplicate code.
This function is needed by KVM to execute a function on some CPUs.
AK: Fixed description

AK: Moved WARN_ON(irqs_disabled) one level up to not warn in the panic case.
 arch/x86_64/kernel/smp.c |  118 ++++++++++++++++++++++++-----------------------

 include/asm-x86_64/smp.h |    2

 arch/x86_64/kernel/smp.c |  119 ++++++++++++++++++++++++-----------------------

 include/asm-x86_64/smp.h |    2

 2 files changed, 65 insertions(+), 56 deletions(-)
Signed-off-by: Laurent Vivier <Laurent.Vivier@bull.net>

Signed-off-by: Andi Kleen <ak@suse.de>
Index: linux/arch/x86_64/kernel/smp.c

===================================================================

--- linux.orig/arch/x86_64/kernel/smp.c

+++ linux/arch/x86_64/kernel/smp.c

@@ -322,17 +322,27 @@ void unlock_ipi_call_lock(void)

 }
 /*

- * this function sends a 'generic call function' IPI to one other CPU

- * in the system.

- *

- * cpu is a standard Linux logical CPU number.

+ * this function sends a 'generic call function' IPI to all other CPU

+ * of the system defined in the mask.

  */

-static void

-__smp_call_function_single(int cpu, void (*func) (void *info), void *info,

-				int nonatomic, int wait)

+

+static int

+__smp_call_function_mask(cpumask_t mask,

+			 void (*func)(void *), void *info,

+			 int wait)

 {

 	struct call_data_struct data;

-	int cpus = 1;

+	cpumask_t allbutself;

+	int cpus;

+

+	allbutself = cpu_online_map;

+	cpu_clear(smp_processor_id(), allbutself);

+

+	cpus_and(mask, mask, allbutself);

+	cpus = cpus_weight(mask);

+

+	if (!cpus)

+		return 0;
 	data.func = func;

 	data.info = info;

@@ -343,19 +353,55 @@ __smp_call_function_single(int cpu, void
 	call_data = &data;

 	wmb();

-	/* Send a message to all other CPUs and wait for them to respond *...
[ message continues ]

From: Steven Rostedt <rostedt@goodmis.org>

It is not good taste to have macros with additions that do not have

parenthesis's around them.  This patch parethesizes the IRQ vector

macros for x86_64 arch.
Note, this caused me a bit of heart-ache debugging lguest64.
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>

Signed-off-by: Andi Kleen <ak@suse.de>
---

 include/asm-x86_64/hw_irq.h |   32 ++++++++++++++++----------------

 1 file changed, 16 insertions(+), 16 deletions(-)
Index: linux/include/asm-x86_64/hw_irq.h

===================================================================

--- linux.orig/include/asm-x86_64/hw_irq.h

+++ linux/include/asm-x86_64/hw_irq.h

@@ -40,22 +40,22 @@

 /*

  * Vectors 0x30-0x3f are used for ISA interrupts.

  */

-#define IRQ0_VECTOR		FIRST_EXTERNAL_VECTOR + 0x10

-#define IRQ1_VECTOR		IRQ0_VECTOR + 1

-#define IRQ2_VECTOR		IRQ0_VECTOR + 2

-#define IRQ3_VECTOR		IRQ0_VECTOR + 3

-#define IRQ4_VECTOR		IRQ0_VECTOR + 4

-#define IRQ5_VECTOR		IRQ0_VECTOR + 5

-#define IRQ6_VECTOR		IRQ0_VECTOR + 6

-#define IRQ7_VECTOR		IRQ0_VECTOR + 7

-#define IRQ8_VECTOR		IRQ0_VECTOR + 8

-#define IRQ9_VECTOR		IRQ0_VECTOR + 9

-#define IRQ10_VECTOR		IRQ0_VECTOR + 10

-#define IRQ11_VECTOR		IRQ0_VECTOR + 11

-#define IRQ12_VECTOR		IRQ0_VECTOR + 12

-#define IRQ13_VECTOR		IRQ0_VECTOR + 13

-#define IRQ14_VECTOR		IRQ0_VECTOR + 14

-#define IRQ15_VECTOR		IRQ0_VECTOR + 15

+#define IRQ0_VECTOR		(FIRST_EXTERNAL_VECTOR + 0x10)

+#define IRQ1_VECTOR		(IRQ0_VECTOR + 1)

+#define IRQ2_VECTOR		(IRQ0_VECTOR + 2)

+#define IRQ3_VECTOR		(IRQ0_VECTOR + 3)

+#define IRQ4_VECTOR		(IRQ0_VECTOR + 4)

+#define IRQ5_VECTOR		(IRQ0_VECTOR + 5)

+#define IRQ6_VECTOR		(IRQ0_VECTOR + 6)

+#define IRQ7_VECTOR		(IRQ0_VECTOR + 7)

+#define IRQ8_VECTOR		(IRQ0_VECTOR + 8)

+#define IRQ9_VECTOR		(IRQ0_VECTOR + 9)

+#define IRQ10_VECTOR		(IRQ0_VECTOR + 10)

+#define IRQ11_VECTOR		(IRQ0_VECTOR + 11)

+#define IRQ12_VECTOR		(IRQ0_VECTOR + 12)

+#define IRQ13_VECTOR		(IRQ0_VECTOR + 13)

+#define ...
[ message continues ]

From: Chuck Lever <chuck.lever@oracle.com>

The return type of __scanbit() doesn't match the return type of

find_{first,next}_bit().  Thus when you construct something like

this:
   boolean ? __scanbit() : find_first_bit()
you get an unsigned long result if "boolean" is true, and a signed

long result if "boolean" is false.
In file included from /home/cel/src/linux/include/linux/mmzone.h:15,

                 from /home/cel/src/linux/include/linux/gfp.h:4,

                 from /home/cel/src/linux/include/linux/slab.h:14,

                 from /home/cel/src/linux/include/linux/percpu.h:5,

                 from

/home/cel/src/linux/include/linux/rcupdate.h:41,

                 from /home/cel/src/linux/include/linux/dcache.h:10,

                 from /home/cel/src/linux/include/linux/fs.h:275,

                 from /home/cel/src/linux/fs/nfs/sysctl.c:9:

/home/cel/src/linux/include/linux/nodemask.h: In function

From: Satyam Sharma <satyam@infradead.org>
cpuid_class_cpu_callback() is callback function of a CPU hotplug

notifier_block (that is already marked as __cpuinitdata). Therefore

it can safely be marked as __cpuinit.
cpuid_device_create() is only referenced from other functions that

are __cpuinit or __init. So it can also be safely marked __cpuinit.
Signed-off-by: Satyam Sharma <satyam@infradead.org>

Signed-off-by: Andi Kleen <ak@suse.de>
---
 arch/i386/kernel/cpuid.c |    6 ++++--

 1 file changed, 4 insertions(+), 2 deletions(-)
Index: linux/arch/i386/kernel/cpuid.c

===================================================================

--- linux.orig/arch/i386/kernel/cpuid.c

+++ linux/arch/i386/kernel/cpuid.c

@@ -136,7 +136,7 @@ static const struct file_operations cpui

 	.open = cpuid_open,

 };
-static int cpuid_device_create(int i)

+static int __cpuinit cpuid_device_create(int i)

 {

 	int err = 0;

 	struct device *dev;

@@ -147,7 +147,9 @@ static int cpuid_device_create(int i)

 	return err;

 }
-static int cpuid_class_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)

+static int __cpuinit cpuid_class_cpu_callback(struct notifier_block *nfb,

+					      unsigned long action,

+					      void *hcpu)

 {

 	unsigned int cpu = (unsigned long)hcpu;
-

From: Rafael J. Wysocki <rjw@sisk.pl>
During hibernation and suspend on x86_64 save CPU registers in the saved_context

structure rather than in a handful of separate variables.
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>

Signed-off-by: Andi Kleen <ak@suse.de>

Looks-ok-to: Pavel Machek <pavel@ucw.cz>

---

 arch/x86_64/kernel/acpi/wakeup.S |  101 ++++++++++++++++++++-------------------

 arch/x86_64/kernel/asm-offsets.c |   28 ++++++++++

 arch/x86_64/kernel/suspend.c     |    6 --

 arch/x86_64/kernel/suspend_asm.S |   72 ++++++++++++++-------------

 include/asm-x86_64/suspend.h     |   23 ++------

 5 files changed, 125 insertions(+), 105 deletions(-)
Index: linux/arch/x86_64/kernel/asm-offsets.c

===================================================================

--- linux.orig/arch/x86_64/kernel/asm-offsets.c

+++ linux/arch/x86_64/kernel/asm-offsets.c

@@ -76,6 +76,34 @@ int main(void)

 	DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address));

 	DEFINE(pbe_next, offsetof(struct pbe, next));

 	BLANK();

+#define ENTRY(entry) DEFINE(pt_regs_ ## entry, offsetof(struct pt_regs, entry))

+	ENTRY(rbx);

+	ENTRY(rbx);

+	ENTRY(rcx);

+	ENTRY(rdx);

+	ENTRY(rsp);

+	ENTRY(rbp);

+	ENTRY(rsi);

+	ENTRY(rdi);

+	ENTRY(r8);

+	ENTRY(r9);

+	ENTRY(r10);

+	ENTRY(r11);

+	ENTRY(r12);

+	ENTRY(r13);

+	ENTRY(r14);

+	ENTRY(r15);

+	ENTRY(eflags);

+	BLANK();

+#undef ENTRY

+#define ENTRY(entry) DEFINE(saved_context_ ## entry, offsetof(struct saved_context, entry))

+	ENTRY(cr0);

+	ENTRY(cr2);

+	ENTRY(cr3);

+	ENTRY(cr4);

+	ENTRY(cr8);

+	BLANK();

+#undef ENTRY

 	DEFINE(TSS_ist, offsetof(struct tss_struct, ist));

 	BLANK();

 	DEFINE(crypto_tfm_ctx_offset, offsetof(struct crypto_tfm, __crt_ctx));

Index: linux/include/asm-x86_64/suspend.h

===================================================================

--- linux.orig/include/asm-x86_64/suspend.h

+++ linux/include/asm-x86_64/suspend.h

@@ -3,6 +3,9 @@

  * Based on code

  * Copyright 2001 Patrick Mochel <moc...
[ message continues ]

From: Satyam Sharma <satyam@infradead.org>
msr_class_cpu_callback() can be marked __cpuinit, being the notifier

callback for a __cpuinitdata notifier_block. So can be marked

msr_device_create() too, called only from the newly-__cpuinit

msr_class_cpu_callback() or from __init-marked msr_init().
Signed-off-by: Satyam Sharma <satyam@infradead.org>

Signed-off-by: Andi Kleen <ak@suse.de>
---
 arch/i386/kernel/msr.c |    4 ++--

 1 file changed, 2 insertions(+), 2 deletions(-)
Index: linux/arch/i386/kernel/msr.c

===================================================================

--- linux.orig/arch/i386/kernel/msr.c

+++ linux/arch/i386/kernel/msr.c

@@ -135,7 +135,7 @@ static const struct file_operations msr_

 	.open = msr_open,

 };
-static int msr_device_create(int i)

+static int __cpuinit msr_device_create(int i)

 {

 	int err = 0;

 	struct device *dev;

@@ -146,7 +146,7 @@ static int msr_device_create(int i)

 	return err;

 }
-static int msr_class_cpu_callback(struct notifier_block *nfb,

+static int __cpuinit msr_class_cpu_callback(struct notifier_block *nfb,

 				unsigned long action, void *hcpu)

 {

 	unsigned int cpu = (unsigned long)hcpu;

-

Reenable CLFLUSH support in change_page_attr()
Mark pages that need to be cache flushed with a special bit

before putting them into the deferred list.

(PG_owner_priv_1).  Then only cache flush these pages

and don't free them.
Takes especial care to handle cases where the page's LRU

or owner_priv_1 bit is already used. Fall back to full cache

flushes then.
They probably do not happen right now, but this makes

it more future proof. 
TBD port to i386
Signed-off-by: Andi Kleen <ak@suse.de>
---

 arch/i386/mm/pageattr.c      |   69 +++++++++++++++++++++++++++++++++--------

 arch/x86_64/mm/pageattr.c    |   72 +++++++++++++++++++++++++++++++++----------

 include/asm-i386/pgtable.h   |    2 +

 include/asm-x86_64/pgtable.h |    1

 4 files changed, 115 insertions(+), 29 deletions(-)
Index: linux/arch/x86_64/mm/pageattr.c

===================================================================

--- linux.orig/arch/x86_64/mm/pageattr.c

+++ linux/arch/x86_64/mm/pageattr.c

@@ -13,6 +13,10 @@

 #include <asm/tlbflush.h>

 #include <asm/io.h>
+#define PageFlush(p) test_bit(PG_owner_priv_1, &(p)->flags)

+#define SetPageFlush(p) set_bit(PG_owner_priv_1, &(p)->flags)

+#define TestClearPageFlush(p) test_and_clear_bit(PG_owner_priv_1, &(p)->flags)

+

 pte_t *lookup_address(unsigned long address)

 {

 	pgd_t *pgd = pgd_offset_k(address);

@@ -61,6 +65,11 @@ static struct page *split_large_page(uns

 	return base;

 } 
+struct flush_arg {

+	int full_flush;

+	struct list_head l;

+};

+

 static void cache_flush_page(void *adr)

 {

 	int i;

@@ -70,17 +79,16 @@ static void cache_flush_page(void *adr)
 static void flush_kernel_map(void *arg)

 {

-	struct list_head *l = (struct list_head *)arg;

+	struct flush_arg *a = (struct flush_arg *)arg;

 	struct page *pg;
-	/* When clflush is available always use it because it is

+	/* When clflush is available use it because it is

 	   much cheaper than WBINVD. */

-	/* clflush is still broken. Disab...
[ message continues ]

What is the point of continuing to launder kpte_page here? Page table pages

never get their caching attributes changed, nor would their direct mapping

ever change. (Same for i386, obviously.)
Jan
-

We can only free the page table after all the TLBs have been flushed;

otherwise other CPUs can walk already overwritten data as page tables (which can

then cause various problems). This is similar to the lazy TLB flush logic in the

standard VM.
We don't need to cache flush it though, that is why 0 is passed here.
Admittedly the function argument is a little bogus because the caller

could just do it; didn't change that yet.
-Andi
-

* Sat, 22 Sep 2007 00:32:11 +0200 (CEST)
  +	flush_map(&arg.l);
  CC      arch/x86_64/mm/pageattr.o

arch/x86_64/mm/pageattr.c: In function 'global_flush_tlb':

arch/x86_64/mm/pageattr.c:274: warning: passing argument 1 of 'flush_map' from incompatible pointer type
(for i386 seems too)
Is it worth introducing more of that Pascal style? Yes, page stuff is

all about it, but still.
Saves 16 bytes in non optimized compile (if tcc will ever do this :)
static struct page *flush_page(unsigned long address)

{

	struct page *p = NULL;
	if (pfn_valid(__pa(address) >> PAGE_SHIFT)) {

		p = virt_to_page(address);

		if (PageFlush(p) || PageLRU(p))

			if (!test_bit(PG_arch_1, &p->flags))

				p = NULL;

	}

	return p;
i386 case here.

____

-

That was already fixed; hmm perhaps that was an old patch.
-Andi

-

No functional changes

Signed-off-by: Andi Kleen <ak@suse.de>
---

 arch/x86_64/mm/init.c |   40 ++++++++++++++++++++--------------------

 1 file changed, 20 insertions(+), 20 deletions(-)
Index: linux/arch/x86_64/mm/init.c

===================================================================

--- linux.orig/arch/x86_64/mm/init.c

+++ linux/arch/x86_64/mm/init.c

@@ -73,7 +73,7 @@ void show_mem(void)

 	printk(KERN_INFO "Free swap:       %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10));
 	for_each_online_pgdat(pgdat) {

-               for (i = 0; i < pgdat->node_spanned_pages; ++i) {

+		for (i = 0; i < pgdat->node_spanned_pages; ++i) {

 			/* this loop can take a while with 256 GB and 4k pages

 			   so update the NMI watchdog */

 			if (unlikely(i % MAX_ORDER_NR_PAGES == 0)) {

@@ -89,7 +89,7 @@ void show_mem(void)

 				cached++;

 			else if (page_count(page))

 				shared += page_count(page) - 1;

-               }

+		}

 	}

 	printk(KERN_INFO "%lu pages of RAM\n", total);

 	printk(KERN_INFO "%lu reserved pages\n",reserved);

@@ -114,7 +114,7 @@ static __init void *spp_getpage(void)

 } 
 static __init void set_pte_phys(unsigned long vaddr,

-			 unsigned long phys, pgprot_t prot)

+				unsigned long phys, pgprot_t prot)

 {

 	pgd_t *pgd;

 	pud_t *pud;

@@ -324,7 +324,7 @@ static void __init find_early_table_spac

 	puds = (end + PUD_SIZE - 1) >> PUD_SHIFT;

 	pmds = (end + PMD_SIZE - 1) >> PMD_SHIFT;

 	tables = round_up(puds * sizeof(pud_t), PAGE_SIZE) +

-		 round_up(pmds * sizeof(pmd_t), PAGE_SIZE);

+		round_up(pmds * sizeof(pmd_t), PAGE_SIZE);
  	/* RED-PEN putting page tables only on node 0 could

  	   cause a hotspot and fill up ZONE_DMA. The page tables

@@ -338,8 +338,8 @@ static void __init find_early_table_spac

 	table_end = table_start;
 	early_printk("kernel direct mapping tables up to %lx @ %lx-%lx\n",

-		end, table_start << PAGE_SHIFT,

-		(table_start << PAGE_SHIFT) + tables);

+		     end, table_start << PAG...
[ message continues ]

Can we please fix _ALL_ white space and coding style issues in this file

while we are at it?
Updated patch below.
	tglx
diff --git a/arch/x86_64/mm/init.c b/arch/x86_64/mm/init.c

index 458893b..346c962 100644

--- a/arch/x86_64/mm/init.c

+++ b/arch/x86_64/mm/init.c

@@ -70,10 +70,11 @@ void show_mem(void)
 	printk(KERN_INFO "Mem-info:\n");

 	show_free_areas();

-	printk(KERN_INFO "Free swap:       %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10));

+	printk(KERN_INFO "Free swap:       %6ldkB\n",

+	       nr_swap_pages<<(PAGE_SHIFT-10));
 	for_each_online_pgdat(pgdat) {

-               for (i = 0; i < pgdat->node_spanned_pages; ++i) {

+		for (i = 0; i < pgdat->node_spanned_pages; ++i) {

 			/* this loop can take a while with 256 GB and 4k pages

 			   so update the NMI watchdog */

 			if (unlikely(i % MAX_ORDER_NR_PAGES == 0)) {

@@ -89,7 +90,7 @@ void show_mem(void)

 				cached++;

 			else if (page_count(page))

 				shared += page_count(page) - 1;

-               }

+		}

 	}

 	printk(KERN_INFO "%lu pages of RAM\n", total);

 	printk(KERN_INFO "%lu reserved pages\n",reserved);

@@ -100,21 +101,22 @@ void show_mem(void)

 int after_bootmem;
 static __init void *spp_getpage(void)

-{

+{

 	void *ptr;

 	if (after_bootmem)

-		ptr = (void *) get_zeroed_page(GFP_ATOMIC);

+		ptr = (void *) get_zeroed_page(GFP_ATOMIC);

 	else

 		ptr = alloc_bootmem_pages(PAGE_SIZE);

 	if (!ptr || ((unsigned long)ptr & ~PAGE_MASK))

-		panic("set_pte_phys: cannot allocate page data %s\n", after_bootmem?"after bootmem":"");

+		panic("set_pte_phys: cannot allocate page data %s\n",

+		      after_bootmem?"after bootmem":"");
 	Dprintk("spp_getpage %p\n", ptr);

 	return ptr;

-}

+}
 static __init void set_pte_phys(unsigned long vaddr,

-			 unsigned long phys, pgprot_t prot)

+				unsigned long phys, pgprot_t prot)

 {

 	pgd_t *pgd;

 	pud_t *pud;

@@ -130,10 +132,11 @@ static __init void set_pte_phys(unsigned long vaddr,

 	}

 	pud = pud_offset(pgd, vaddr);

...
[ message continues ]

+static void __meminit phys_pud_init(pud_t *pud_page, ulong addr, ulong end)
If somebody have *strong* objections, please say so.
Maybe just?
+	return __alloc_bootmem_core(pgdat->bdata, size, SMP_CACHE_BYTES, 1UL << 32, 0);
(87 is alright sometimes)

_____

-

Instead of open coding the bit accesses uses standard style

*PageDeferred* macros. 
Signed-off-by: Andi Kleen <ak@suse.de>
---

 arch/i386/mm/pageattr.c   |   10 +++++++---

 arch/x86_64/mm/pageattr.c |   11 ++++++++---

 2 files changed, 15 insertions(+), 6 deletions(-)
Index: linux/arch/x86_64/mm/pageattr.c

===================================================================

--- linux.orig/arch/x86_64/mm/pageattr.c

+++ linux/arch/x86_64/mm/pageattr.c

@@ -17,6 +17,11 @@

 #define SetPageFlush(p) set_bit(PG_owner_priv_1, &(p)->flags)

 #define TestClearPageFlush(p) test_and_clear_bit(PG_owner_priv_1, &(p)->flags)
+#define PageDeferred(p) test_bit(PG_arch_1, &(p)->flags)

+#define SetPageDeferred(p) set_bit(PG_arch_1, &(p)->flags)

+#define ClearPageDeferred(p) clear_bit(PG_arch_1, &(p)->flags)

+#define TestSetPageDeferred(p) test_and_set_bit(PG_arch_1, &(p)->flags)

+

 pte_t *lookup_address(unsigned long address)

 {

 	pgd_t *pgd = pgd_offset_k(address);

@@ -101,7 +106,7 @@ static inline void save_page(struct page

 {

 	if (data && cpu_has_clflush)

 		SetPageFlush(fpage);

-	if (test_and_set_bit(PG_arch_1, &fpage->flags))

+	if (TestSetPageDeferred(fpage))

 		return;

 	if (cpu_has_clflush || !data)

 		list_add(&fpage->lru, &deferred_pages);

@@ -137,7 +142,7 @@ static struct page *flush_page(unsigned

 	if (!(pfn_valid(__pa(address) >> PAGE_SHIFT)))

 		return NULL;

 	p = virt_to_page(address);

-	if ((PageFlush(p) || PageLRU(p)) && !test_bit(PG_arch_1, &p->flags))

+	if ((PageFlush(p) || PageLRU(p)) && !PageDeferred(p))

 		return NULL;

 	return p;

 }

@@ -272,7 +277,7 @@ void global_flush_tlb(void)
 	list_for_each_entry_safe(pg, next, &arg.l, lru) {

 		list_del(&pg->lru);

-		clear_bit(PG_arch_1, &pg->flags);

+		ClearPageDeferred(pg);

 		if (TestClearPageFlush(pg))

 			continue;

 		if (page_private(pg) != 0)

Index: linux/arch/i386/mm/pageattr.c

===...
[ message continues ]

Also allow to set svm lock.
TBD double check, documentation, i386 support
Signed-off-by: Andi Kleen <ak@suse.de>
---

 arch/x86_64/kernel/setup.c    |   25 +++++++++++++++++++++++--

 include/asm-i386/cpufeature.h |    1 +

 include/asm-i386/msr-index.h  |    3 +++

 3 files changed, 27 insertions(+), 2 deletions(-)
Index: linux/arch/x86_64/kernel/setup.c

===================================================================

--- linux.orig/arch/x86_64/kernel/setup.c

+++ linux/arch/x86_64/kernel/setup.c

@@ -565,7 +565,7 @@ static void __cpuinit early_init_amd(str
 static void __cpuinit init_amd(struct cpuinfo_x86 *c)

 {

-	unsigned level;

+	unsigned level, flags, dummy;
 #ifdef CONFIG_SMP

 	unsigned long value;

@@ -634,7 +634,28 @@ static void __cpuinit init_amd(struct cp

 	/* Family 10 doesn't support C states in MWAIT so don't use it */

 	if (c->x86 == 0x10 && !force_mwait)

 		clear_bit(X86_FEATURE_MWAIT, &c->x86_capability);

+

+	if (c->x86 >= 0xf && c->x86 <= 0x11 &&

+	    !rdmsr_safe(MSR_VM_CR, &flags, &dummy) &&

+	    (flags & 0x18))

+		set_bit(X86_FEATURE_VIRT_DISABLED, &c->x86_capability);

+}

+

+static int enable_svm_lock(char *s)

+{

+	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&

+		boot_cpu_data.x86 >= 0xf && boot_cpu_data.x86 <= 0x11) {

+		unsigned a,b;

+		if (rdmsr_safe(MSR_VM_CR, &a, &b))

+			return 0;

+		a |= (1 << 3);	/* set SVM lock */

+		if (!wrmsr_safe(MSR_VM_CR, &a, &b))

+			return 1;

+	}

+	printk(KERN_ERR "CPU does not support svm_lock\n");

+	return 0;

 }

+__setup("svm_lock", enable_svm_lock);
 static void __cpuinit detect_ht(struct cpuinfo_x86 *c)

 {

@@ -985,7 +1006,7 @@ static int show_cpuinfo(struct seq_file

 		NULL, NULL, NULL, NULL,

 		"constant_tsc", "up", NULL, "arch_perfmon",

 		"pebs", "bts", NULL, "sync_rdtsc",

-		"rep_good", NULL, NULL, NULL, NULL, NULL, NULL, NULL,

+		"rep_good", "virtualization_...
[ message continues ]

Please use two separate patches. The detection and cpuinfo display is
Why the check for 0x18 ???? And please can we use understandable

constants for this.
bit 3 (SVM_LOCK) controls only the writeability of bit 4 (SVME_DISABLE),

which controls whether SVM is allowed to be enabled or not. 
bit 3	bit 4

0	0	SVM can be enabled in EFER, SVME_DISABLE is writeable

1	0	SVM can be enabled in EFER, SVME_DISABLE is not writeable

0	1	SVM can not be enabled in EFER, SVME_DISABLE is writeable

1	1	SVM can not be enabled in EFER, SVME_DISABLE is not writeable
SVM_LOCK is read only according to data sheet. You can set bit 4

(SVME_DISABLE) to prevent KVM or what else using that feature.
	tglx
-

I don't think we need this patch. When SVM is disabled KVM will tell on

module load. Further with SVM-lock it will be possible to re-enable SVM

even if it was disabled by BIOS using a key. In this case the user of

SVM has to clear the capability bit you set in this patch for all cpus.
-

The point is that people often want to know in advance (before they
Not sure I follow you. Can you clarify?  What exactly needs to be

done to do a full non reversible lock? 
-Andi
-

If the CPU supports SVM this is visible to the user because the SVM

feature flag does not disappear when its disabled. But because with CPUs

having the SVM-lock feature it can be re-enabled in a secure way under

some circumstances the information in /proc/cpuinfo will not be

reliable. Maybe we can check for it in identify_cpu() and print to the

kernel log if its disabled? It will be visible to the user through

dmesg.
Joerg

-

Who would reenable it in what circumstances? 
-Andi
-

I plan to implement the ability to re-enable it into the SVM module of KVM.

The key required for this will be passed as a module parameter.
Joerg

-

Could we have this patch tagged with x86 instead of "Experimental" in subject.
	Sam

-

From: Glauber de Oliveira Costa <gcosta@redhat.com>

This patch removes the __STR() and STR() macros from x86_64 header files.

They seem to be legacy, and has no more users. Even if there were users,

they should use __stringify() instead.
In fact, there were one third place in which this macro was defined

(ia32_binfmt.c), and used just below. In this file, usage was properly

converted to __stringify()
Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com>

Signed-off-by: Andi Kleen <ak@suse.de>
---

 arch/x86_64/ia32/ia32_binfmt.c |    5 +----

 include/asm-x86_64/hw_irq.h    |    3 ---

 include/asm-x86_64/system.h    |    3 ---

 3 files changed, 1 insertion(+), 10 deletions(-)
Index: linux/arch/x86_64/ia32/ia32_binfmt.c

===================================================================

--- linux.orig/arch/x86_64/ia32/ia32_binfmt.c

+++ linux/arch/x86_64/ia32/ia32_binfmt.c

@@ -112,11 +112,8 @@ struct elf_prpsinfo

 	char	pr_psargs[ELF_PRARGSZ];	/* initial part of arg list */

 };
-#define __STR(x) #x

-#define STR(x) __STR(x)

-

 #define _GET_SEG(x) \

-	({ __u32 seg; asm("movl %%" STR(x) ",%0" : "=r"(seg)); seg; })

+	({ __u32 seg; asm("movl %%" __stringify(x) ",%0" : "=r"(seg)); seg; })
 /* Assumes current==process to be dumped */

 #define ELF_CORE_COPY_REGS(pr_reg, regs)       		\

Index: linux/include/asm-x86_64/hw_irq.h

===================================================================

--- linux.orig/include/asm-x86_64/hw_irq.h

+++ linux/include/asm-x86_64/hw_irq.h

@@ -149,9 +149,6 @@ extern atomic_t irq_mis_count;
 #define IO_APIC_IRQ(x) (((x) >= 16) || ((1<<(x)) & io_apic_irqs))
-#define __STR(x) #x

-#define STR(x) __STR(x)

-

 #include <asm/ptrace.h>
 #define IRQ_NAME2(nr) nr##_interrupt(void)

Index: linux/include/asm-x86_64/system.h

===================================================================

--- linux.orig/include/asm-x86_64/system.h

+++ linux/include/asm-x86_64/system.h

@@ -7,9 +7,6 @@
 #ifde...
[ message continues ]

From: Roland McGrath <roland@redhat.com>
This keeps an unstripped copy of the 64bit vDSO images built before they are

stripped and embedded in the kernel.  The unstripped copies get installed

in $(MODLIB)/vdso/ by "make install" (or you can explicitly use the

subtarget "make vdso_install").  These files can be useful when they

contain source-level debugging information.
Signed-off-by: Roland McGrath <roland@redhat.com>

Signed-off-by: Andi Kleen <ak@suse.de>
---

 arch/x86_64/Makefile      |    1 +

 arch/x86_64/vdso/Makefile |   20 ++++++++++++++++----

 2 files changed, 17 insertions(+), 4 deletions(-)
Index: linux/arch/x86_64/Makefile

===================================================================

--- linux.orig/arch/x86_64/Makefile

+++ linux/arch/x86_64/Makefile

@@ -120,6 +120,7 @@ vdso_install:

 ifeq ($(CONFIG_IA32_EMULATION),y)

 	$(Q)$(MAKE) $(build)=arch/x86_64/ia32 $@

 endif

+	$(Q)$(MAKE) $(build)=arch/x86_64/vdso $@
 archclean:

 	$(Q)$(MAKE) $(clean)=$(boot)

Index: linux/arch/x86_64/vdso/Makefile

===================================================================

--- linux.orig/arch/x86_64/vdso/Makefile

+++ linux/arch/x86_64/vdso/Makefile

@@ -13,7 +13,7 @@ vobjs := $(foreach F,$(vobjs-y),$(obj)/$
 $(obj)/vdso.o: $(obj)/vdso.so
-targets += vdso.so vdso.lds $(vobjs-y) vdso-syms.o

+targets += vdso.so vdso.so.dbg vdso.lds $(vobjs-y) vdso-syms.o
 # The DSO images are built using a special linker script.

 quiet_cmd_syscall = SYSCALL $@

@@ -25,14 +25,18 @@ export CPPFLAGS_vdso.lds += -P -C -U$(AR

 vdso-flags = -fPIC -shared -Wl,-soname=linux-vdso.so.1 \

 		 $(call ld-option, -Wl$(comma)--hash-style=sysv) \

 		-Wl,-z,max-page-size=4096 -Wl,-z,common-page-size=4096

-SYSCFLAGS_vdso.so = $(vdso-flags)

+SYSCFLAGS_vdso.so.dbg = $(vdso-flags)
 $(obj)/vdso.o: $(src)/vdso.S $(obj)/vdso.so
-$(obj)/vdso.so: $(src)/vdso.lds $(vobjs) FORCE

+$(obj)/vdso.so.dbg: $(src)/vdso.lds $(vobjs) FORCE

 	$(call if_changed,syscall)
-CFL := $(PR...
[ message continues ]

Remove a one liner function and expand into parent.

No functional changes.
Signed-off-by: Andi Kleen <ak@suse.de>
---

 arch/i386/mm/pageattr.c   |    7 +------

 arch/x86_64/mm/pageattr.c |    7 +------

 2 files changed, 2 insertions(+), 12 deletions(-)
Index: linux/arch/x86_64/mm/pageattr.c

===================================================================

--- linux.orig/arch/x86_64/mm/pageattr.c

+++ linux/arch/x86_64/mm/pageattr.c

@@ -93,11 +93,6 @@ static void flush_kernel_map(void *arg)

 	__flush_tlb_all();

 }
-static inline void flush_map(struct list_head *l)

-{

-	on_each_cpu(flush_kernel_map, l, 1, 1);

-}

-

 /* both protected by init_mm.mmap_sem */

 static int full_flush;

 static LIST_HEAD(deferred_pages);

@@ -271,7 +266,7 @@ void global_flush_tlb(void)

 	list_replace_init(&deferred_pages, &arg.l);

 	up_read(&init_mm.mmap_sem);
-	flush_map(&arg);

+	on_each_cpu(flush_kernel_map, &arg, 1, 1);
 	list_for_each_entry_safe(pg, next, &arg.l, lru) {

 		list_del(&pg->lru);

Index: linux/arch/i386/mm/pageattr.c

===================================================================

--- linux.orig/arch/i386/mm/pageattr.c

+++ linux/arch/i386/mm/pageattr.c

@@ -238,11 +238,6 @@ __change_page_attr(struct page *page, pg

 	return 0;

 } 
-static inline void flush_map(struct list_head *l)

-{

-	on_each_cpu(flush_kernel_map, l, 1, 1);

-}

-

 /*

  * Change the page attributes of an page in the linear mapping.

  *

@@ -284,7 +279,7 @@ void global_flush_tlb(void)

 	full_flush = 0;

 	list_replace_init(&df_list, &arg.l);

 	spin_unlock_irq(&cpa_lock);

-	flush_map(&arg);

+	on_each_cpu(flush_kernel_map, &arg, 1, 1);

 	list_for_each_entry_safe(pg, next, &arg.l, lru) {

 		list_del(&pg->lru);

 		clear_bit(PG_arch_1, &pg->flags);

-

Matches what i386 does and makes more sense.
Signed-off-by: Andi Kleen <ak@suse.de>
---

 arch/x86_64/mm/pageattr.c |    4 +++-

 1 file changed, 3 insertions(+), 1 deletion(-)
Index: linux/arch/x86_64/mm/pageattr.c

===================================================================

--- linux.orig/arch/x86_64/mm/pageattr.c

+++ linux/arch/x86_64/mm/pageattr.c

@@ -151,7 +151,9 @@ __change_page_attr(unsigned long address

 	pgprot_t ref_prot2;
 	kpte = lookup_address(address);

-	if (!kpte) return 0;

+	if (!kpte)

+		return -EINVAL;

+

 	kpte_page = virt_to_page(((unsigned long)kpte) & PAGE_MASK);

 	BUG_ON(PageCompound(kpte_page));

 	BUG_ON(PageLRU(kpte_page));

-

This should be accompanied by
 			addr2 = __START_KERNEL_map + __pa(address);

 			/* Make sure the kernel mappings stay executable */

 			prot2 = pte_pgprot(pte_mkexec(pfn_pte(0, prot)));

-			err = __change_page_attr(addr2, pfn, prot2,

+			(void)__change_page_attr(addr2, pfn, prot2,

 						 kref_prot(addr2));

 		}

 	} 	
as otherwise it is non-obvious why there's no check of err (which so far really

was missing). The reason this must be tolerated here is free_init_pages()/

free_initmem() removing the translation for the affected kernel image pages

altogether.
Matches what i386 does and makes more sense.
Signed-off-by: Andi Kleen <ak@suse.de>
---

 arch/x86_64/mm/pageattr.c |    4 +++-

 1 file changed, 3 insertions(+), 1 deletion(-)
Index: linux/arch/x86_64/mm/pageattr.c

===================================================================

--- linux.orig/arch/x86_64/mm/pageattr.c

+++ linux/arch/x86_64/mm/pageattr.c

@@ -151,7 +151,9 @@ __change_page_attr(unsigned long address

 	pgprot_t ref_prot2;
 	kpte = lookup_address(address);

-	if (!kpte) return 0;

+	if (!kpte)

+		return -EINVAL;

+

 	kpte_page = virt_to_page(((unsigned long)kpte) & PAGE_MASK);

 	BUG_ON(PageCompound(kpte_page));

 	BUG_ON(PageLRU(kpte_page));

_______________________________________________

patches mailing list

patches@x86-64.org

https://www.x86-64.org/mailman/listinfo/patches
-

Earlier patch added IO APIC setup into local APIC setup. This caused

modpost warnings. Fix them by untangling setup_local_APIC() and splitting

it into smaller functions. The IO APIC initialization is only called

for the BP init.
Also removed some outdated debugging code and minor cleanup.

Signed-off-by: Andi Kleen <ak@suse.de>
---

 arch/x86_64/kernel/apic.c    |   46 ++++++++++++++++++++-----------------------

 arch/x86_64/kernel/smpboot.c |    8 +++++++

 include/asm-x86_64/apic.h    |    1

 3 files changed, 31 insertions(+), 24 deletions(-)
Index: linux/arch/x86_64/kernel/apic.c

===================================================================

--- linux.orig/arch/x86_64/kernel/apic.c

+++ linux/arch/x86_64/kernel/apic.c

@@ -323,7 +323,7 @@ void __init init_bsp_APIC(void)
 void __cpuinit setup_local_APIC (void)

 {

-	unsigned int value, maxlvt;

+	unsigned int value;

 	int i, j;
 	value = apic_read(APIC_LVR);

@@ -417,33 +417,22 @@ void __cpuinit setup_local_APIC (void)

 	else

 		value = APIC_DM_NMI | APIC_LVT_MASKED;

 	apic_write(APIC_LVT1, value);

+}
+void __cpuinit lapic_setup_esr(void)

+{

+	unsigned maxlvt = get_maxlvt();

+	apic_write(APIC_LVTERR, ERROR_APIC_VECTOR);

 	/*

-	 * Now enable IO-APICs, actually call clear_IO_APIC

-	 * We need clear_IO_APIC before enabling vector on BP

+	 * spec says clear errors after enabling vector.

 	 */

-	if (!smp_processor_id())

-	if (!skip_ioapic_setup && nr_ioapics)

-		enable_IO_APIC();

-

-	{

-		unsigned oldvalue;

-		maxlvt = get_maxlvt();

-		oldvalue = apic_read(APIC_ESR);

-		value = ERROR_APIC_VECTOR;      // enables sending errors

-		apic_write(APIC_LVTERR, value);

-		/*

-		 * spec says clear errors after enabling vector.

-		 */

-		if (maxlvt > 3)

-			apic_write(APIC_ESR, 0);

-		value = apic_read(APIC_ESR);

-		if (value != oldvalue)

-			apic_printk(APIC_VERBOSE,

-			"ESR value after enabling vector: %08x, after %08x\n",

-			oldvalue, value);

-	}

+	if (maxlvt > 3)

+		apic_write(A...
[ message continues ]

here it is uniprocessor...

so
sync_Arb_IDs is still left there?
YH

-

From: Joe Korty <joe.korty@ccur.com>
Add missing IRQs and IRQ descriptions to /proc/interrupts.
/proc/interrupts is most useful when it displays every IRQ vector in use by

the system, not just those somebody thought would be interesting.
This patch inserts the following vector displays to the i386 and x86_64

platforms, as appropriate:
	rescheduling interrupts

	TLB flush interrupts

	function call interrupts

	thermal event interrupts

	threshold interrupts

	spurious interrupts
A threshold interrupt occurs when ECC memory correction is occuring at too

high a frequency.  Thresholds are used by the ECC hardware as occasional

ECC failures are part of normal operation, but long sequences of ECC

failures usually indicate a memory chip that is about to fail.
Thermal event interrupts occur when a temperature threshold has been

exceeded for some CPU chip.  IIRC, a thermal interrupt is also generated

when the temperature drops back to a normal level.
A spurious interrupt is an interrupt that was raised then lowered by the

device before it could be fully processed by the APIC.  Hence the apic sees

the interrupt but does not know what device it came from.  For this case

the APIC hardware will assume a vector of 0xff.
Rescheduling, call, and TLB flush interrupts are sent from one CPU to

another per the needs of the OS.  Typically, their statistics would be used

to discover if an interrupt flood of the given type has been occuring.
AK: merged v2 and v4 which had some more tweaks
Signed-off-by: Joe Korty <joe.korty@ccur.com>

Signed-off-by: Andi Kleen <ak@suse.de>

Cc: Tim Hockin <thockin@hockin.org>

Cc: Andi Kleen <ak@suse.de>

Cc: Ingo Molnar <mingo@elte.hu>

Cc: "H. Peter Anvin" <hpa@zytor.com>

Signed-off-by: Andrew Morton <akpm@linux-foundation.org>

---
 Documentation/filesystems/proc.txt   |   35 ++++++++++++++++++++++++++++++++++-

 arch/i386/kernel/apic.c              |    1 +

 arch/i386/kernel/cpu/mcheck/p4.c     |    1 ...
[ message continues ]

* Sat, 22 Sep 2007 00:32:05 +0200 (CEST)
 +  THR -- a threshold interrupt happens, when frequency of ECC memory

 +  corrections is too high. Threshold interrupt machinery is often put

 +  into the ECC hardware, and must be explicitly enabled, if so. Occasional

 +  ECC memory corrections are part of the normal operation (ionizing radiation

 +  background). Sequences of ECC corrections or outright failures over some

 +  short interval, usually indicate a memory chip, that is about to fail

 +  completely.
 +  SPU -- a spurious interrupt. This is an interrupt, that was raised then lowered

 +  so quickly, that it was not fully processed by the APIC.  Hence,

 +  origin of it is unknown.
 +  RES, CAL, TLB -- rescheduling, call and tlb flush interrupts,

 +  produced by normal OS operation.  Typically,

 +  this information is used by kernel developers and interested users to

_____

-

Looks good to me.

Joe
Acked-by: Joe Korty <joe.korty@ccur.com>

-

From: Robert Hancock <hancockr@shaw.ca>
This path adds validation of the MMCONFIG table against the ACPI reserved

motherboard resources.  If the MMCONFIG table is found to be reserved in

ACPI, we don't bother checking the E820 table.  The PCI Express firmware

spec apparently tells BIOS developers that reservation in ACPI is required

and E820 reservation is optional, so checking against ACPI first makes

sense.  Many BIOSes don't reserve the MMCONFIG region in E820 even though

it is perfectly functional, the existing check needlessly disables MMCONFIG

in these cases.
In order to do this, MMCONFIG setup has been split into two phases.  If PCI

configuration type 1 is not available then MMCONFIG is enabled early as

before.  Otherwise, it is enabled later after the ACPI interpreter is

enabled, since we need to be able to execute control methods in order to

check the ACPI reserved resources.  Presently this is just triggered off

the end of ACPI interpreter initialization.
There are a few other behavioral changes here:
- Validate all MMCONFIG configurations provided, not just the first one.
- Validate the entire required length of each configuration according to

  the provided ending bus number is reserved, not just the minimum required

  allocation.
- Validate that the area is reserved even if we read it from the chipset

  directly and not from the MCFG table.  This catches the case where the

  BIOS didn't set the location properly in the chipset and has mapped it

  over other things it shouldn't have.
This also cleans up the MMCONFIG initialization functions so that they

simply do nothing if MMCONFIG is not compiled in.
Based on an original patch by Rajesh Shah from Intel.
[akpm@linux-foundation.org: many fixes and cleanups]

Signed-off-by: Robert Hancock <hancockr@shaw.ca>

Signed-off-by: Andi Kleen <ak@suse.de>

Cc: Rajesh Shah <rajesh.shah@intel.com>

Cc: Jesse Barnes <jbarnes@virtuousgeek.org>

Acked-by: Linus Torvalds <torvalds@linux-f...
[ message continues ]

No!
MMCONFIG will not work with acpi=off any more.
because acpi_init==>pci_mmcfg_late_init==>pci_mmcfg_check_hostbridge...
can you move pci_mmcfg_later_init out of acpi_init and just call

somewhere after acpi_init...

or put pci_mmcfg_check_hostbridge back to pci_mmcfg_early_init?
YH

-

I don't think this is unreasonable. The ACPI MCFG table is how we are

supposed to learn about the area in the first place. If we can't get the

table location via an approved mechanism, and can't validate it doesn't

overlap with another memory reservation or something, I really don't

think we should be using it.
I don't think it's much of an issue anyway - the chances that somebody

will want to run without ACPI on a system with MCFG are pretty low given

that you'll end up losing a bunch of functionality (not least of which

-

with acpi=off, that we do lose some features including acpi hotplug

and power management feature...

but we don't lose anything about numa ( multi-cores...) and

bus-numa... (we get these info from NB pci conf for AMD rev C, rev E,

rev F, and Fam 10 opteron)...
Finally we lose bugs introduced by ACPI code ...
YH

-

We all know how correct ACPI tables are. Specifications are nice,
acpi=off is an often used debug switch and it _is_ quite useful. Taking

away debug functionality is not a good idea.
	tglx
-

MMCONFIG can't be used without ACPI in any case unless we know where the

  table is using chipset-specific knowledge (i.e. reading the registers

directly). Doing that without being told that this area is really

intended to be used, via the ACPI table, is dangerous, i.e. we don't

necessarily know if the MMCONFIG is broken on the platform in some way 
If someone has to turn ACPI off, disabling MMCONFIG is probably the

least of their worries..
--

Robert Hancock      Saskatoon, SK, Canada

To email, remove "nospam" from hancockr@nospamshaw.ca

Home Page: http://www.roberthancock.com/
-

the BIOS get these info from the chipset too.
MMCONFIG has nothing to do ACPI..., just becase MCFG in the ACPI, we

must use ACPI for MMCONFIG?
For AMD Fam 10h opteron, because using MMCONFIG need via %eax, so BIOS

will stilll stay with MCFG entry for MCP55 SB to not break other

os..., then you can not access ext config space for NB...
with enabling MMCONFIG in NB, and read NNCONFIG BASE from NB,( via

pci_mmcfg_check_hostbridge) that we get full MMCONFIG access for NB...
Anyway this patch alter the feature...
BTW if you trust MCFG in ACPI so much, why do you need to bother to

verify that in DSDT...
YH

-

config PCI_MMCONFIG

          bool

          depends on PCI && ACPI && (PCI_GOMMCONFIG || PCI_GOANY)

          default y
We already depend on ACPI for MMCONFIG support at compile time. This

patch does not change that.
We could conceivably skip the validation if ACPI was disabled, though

this would only make a difference in the few cases where we can detect

the MMCONFIG area without it (looks like currently only Intel E7520 and 
One reason is that Windows pre-Vista does not use the MCFG table, it

does use the ACPI reserved resources. Since the board/system

manufacturers have been testing against Windows, the resource

reservations should be more likely correct than the MCFG table which was

not used until Vista came along.

-

i added support for AMD Fam 10h NB, and that patch is in -mm.
I like to see pci_mmcfg_check_hostbridge is called before any acpi check up.
also in your pci_mmcfg_early_init, you may miss calling to

pci_mmcfg_insert_resource...
YH

-

can you make pci_mmcfg_late_init take one parameter about if acpi is

there or not?
so in acpi_init will be
diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c

index 9ba778a..a4a6a6f 100644

--- a/drivers/acpi/bus.c

+++ b/drivers/acpi/bus.c

@@ -746,6 +746,7 @@ static int __init acpi_init(void)
        if (acpi_disabled) {

                printk(KERN_INFO PREFIX "Interpreter disabled.\n");

+               pci_mmcfg_late_init(0);

                return -ENODEV;

        }
@@ -757,6 +758,7 @@ static int __init acpi_init(void)

        result = acpi_bus_init();
        if (!result) {

+               pci_mmcfg_late_init(1);

 #ifdef CONFIG_PM_LEGACY

                if (!PM_IS_ACTIVE())

                        pm_active = 1;

@@ -767,8 +769,10 @@ static int __init acpi_init(void)

                        result = -ENODEV;

                }

 #endif

-       } else

+       } else {

+               pci_mmcfg_late_init(0);

                disable_acpi();

+       }
        return result;

 }
YH

-

I think he's saying we don't know a safe place to park the MMCONFIG area

if we don't have this information.  However, this applies to *any*

allocation of address space, which we do all the time, so although a

valid argument this has been decided already many times over.
	-hpa

-

Also the titile is misleading: it is x86 instead of i386.. because it

will affect x86_64 too.
YH

-

From: Roland McGrath <roland@redhat.com>
This keeps an unstripped copy of the vDSO images built before they are

stripped and embedded in the kernel.  The unstripped copies get installed

in $(MODLIB)/vdso/ by "make install" (or you can explicitly use the

subtarget "make vdso_install").  These files can be useful when they

contain source-level debugging information.
Signed-off-by: Roland McGrath <roland@redhat.com>

Signed-off-by: Andi Kleen <ak@suse.de>
 arch/x86_64/Makefile      |    7 ++++++-

 arch/x86_64/ia32/Makefile |   25 +++++++++++++++++++++----

 2 files changed, 27 insertions(+), 5 deletions(-)
Index: linux/arch/x86_64/Makefile

===================================================================

--- linux.orig/arch/x86_64/Makefile

+++ linux/arch/x86_64/Makefile

@@ -113,9 +113,14 @@ bzdisk: vmlinux

 fdimage fdimage144 fdimage288 isoimage: vmlinux

 	$(Q)$(MAKE) $(build)=$(boot) BOOTIMAGE=$(BOOTIMAGE) $@
-install:

+install: vdso_install

 	$(Q)$(MAKE) $(build)=$(boot) BOOTIMAGE=$(BOOTIMAGE) $@ 
+vdso_install:

+ifeq ($(CONFIG_IA32_EMULATION),y)

+	$(Q)$(MAKE) $(build)=arch/x86_64/ia32 $@

+endif

+

 archclean:

 	$(Q)$(MAKE) $(clean)=$(boot)
Index: linux/arch/x86_64/ia32/Makefile

===================================================================

--- linux.orig/arch/x86_64/ia32/Makefile

+++ linux/arch/x86_64/ia32/Makefile

@@ -18,18 +18,35 @@ $(obj)/syscall32_syscall.o: \

 	$(foreach F,sysenter syscall,$(obj)/vsyscall-$F.so)
 # Teach kbuild about targets

-targets := $(foreach F,sysenter syscall,vsyscall-$F.o vsyscall-$F.so)

+targets := $(foreach F,$(addprefix vsyscall-,sysenter syscall),\

+		     $F.o $F.so $F.so.dbg)
 # The DSO images are built using a special linker script

 quiet_cmd_syscall = SYSCALL $@

-      cmd_syscall = $(CC) -m32 -nostdlib -shared -s \

+      cmd_syscall = $(CC) -m32 -nostdlib -shared \

 			  $(call ld-option, -Wl$(comma)--hash-style=sysv) \

 			   -Wl,-soname=linux-gate.so.1 -o $@ \

 			   -Wl,-T,$(filter-...
[ message continues ]

From: Pavel Emelyanov <xemul@openvz.org>
Typically the oops first lines look like this:
BUG: unable to handle kernel NULL pointer dereference at virtual address 00000000

 printing eip:

c049dfbd

*pde = 00000000

Oops: 0002 [#1]

PREEMPT SMP

...
Such output is gained with some ugly if (!nl) printk("\n"); code and

besides being a waste of lines, this is also annoying to read. The

following output looks better (and it is how it looks on x86_64):
BUG: unable to handle kernel NULL pointer dereference at virtual address 00000000

printing eip: c049dfbd *pde = 00000000

Oops: 0002 [#1] PREEMPT SMP

...
Signed-off-by: Pavel Emelyanov <xemul@openvz.org>

Signed-off-by: Andrew Morton <akpm@linux-foundation.org>

Signed-off-by: Andi Kleen <ak@suse.de>
---
 arch/i386/kernel/traps.c |   16 ++++------------

 arch/i386/mm/fault.c     |   13 +++++++------

 2 files changed, 11 insertions(+), 18 deletions(-)
Index: linux/arch/i386/kernel/traps.c

===================================================================

--- linux.orig/arch/i386/kernel/traps.c

+++ linux/arch/i386/kernel/traps.c

@@ -444,31 +444,23 @@ void die(const char * str, struct pt_reg

 		local_save_flags(flags);
 	if (++die.lock_owner_depth < 3) {

-		int nl = 0;

 		unsigned long esp;

 		unsigned short ss;
 		report_bug(regs->eip, regs);
-		printk(KERN_EMERG "%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);

+		printk(KERN_EMERG "%s: %04lx [#%d] ", str, err & 0xffff, ++die_counter);

 #ifdef CONFIG_PREEMPT

-		printk(KERN_EMERG "PREEMPT ");

-		nl = 1;

+		printk("PREEMPT ");

 #endif

 #ifdef CONFIG_SMP

-		if (!nl)

-			printk(KERN_EMERG);

 		printk("SMP ");

-		nl = 1;

 #endif

 #ifdef CONFIG_DEBUG_PAGEALLOC

-		if (!nl)

-			printk(KERN_EMERG);

 		printk("DEBUG_PAGEALLOC");

-		nl = 1;

 #endif

-		if (nl)

-			printk("\n");

+		printk("\n");

+

 		if (notify_die(DIE_OOPS, str, regs, err,

 					current->thread.trap_no, SIGSEGV) !=

 				NOTIFY_STOP) {

Index: li...
[ message continues ]

* Sat, 22 Sep 2007 00:32:04 +0200 (CEST)
It seems, like size can be reduced even more now:
  +		"\n");
Just hand waving.
FWIW, with more flexible kconfig, ifdiffery can be removed also...

____

-

-

In fact, the EIP can be left out, because it is printed later

as part of the register dump anyway.

-

From: Mike Travis <travis@sgi.com>
Remove the x86_cpu_to_log_apicid array.  It is set in

arch/x86_64/kernel/genapic_flat.c:flat_init_apic_ldr() and

arch/x86_64/kernel/smpboot.c:do_boot_cpu() but it is never

referenced.
Signed-off-by: Mike Travis <travis@sgi.com>

Signed-off-by: Christoph Lameter <clameter@sgi.com>

Signed-off-by: Andrew Morton <akpm@linux-foundation.org>

Signed-off-by: Andi Kleen <ak@suse.de>
---
 arch/x86_64/kernel/genapic.c      |    2 --

 arch/x86_64/kernel/genapic_flat.c |    1 -

 arch/x86_64/kernel/smpboot.c      |    1 -

 include/asm-x86_64/smp.h          |    1 -

 4 files changed, 5 deletions(-)
Index: linux/arch/x86_64/kernel/genapic.c

===================================================================

--- linux.orig/arch/x86_64/kernel/genapic.c

+++ linux/arch/x86_64/kernel/genapic.c

@@ -29,8 +29,6 @@ u8 x86_cpu_to_apicid[NR_CPUS] __read_mos

 					= { [0 ... NR_CPUS-1] = BAD_APICID };

 EXPORT_SYMBOL(x86_cpu_to_apicid);
-u8 x86_cpu_to_log_apicid[NR_CPUS]	= { [0 ... NR_CPUS-1] = BAD_APICID };

-

 struct genapic __read_mostly *genapic = &apic_flat;
 /*

Index: linux/arch/x86_64/kernel/genapic_flat.c

===================================================================

--- linux.orig/arch/x86_64/kernel/genapic_flat.c

+++ linux/arch/x86_64/kernel/genapic_flat.c

@@ -52,7 +52,6 @@ static void flat_init_apic_ldr(void)
 	num = smp_processor_id();

 	id = 1UL << num;

-	x86_cpu_to_log_apicid[num] = id;

 	apic_write(APIC_DFR, APIC_DFR_FLAT);

 	val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;

 	val |= SET_APIC_LOGICAL_ID(id);

Index: linux/arch/x86_64/kernel/smpboot.c

===================================================================

--- linux.orig/arch/x86_64/kernel/smpboot.c

+++ linux/arch/x86_64/kernel/smpboot.c

@@ -702,7 +702,6 @@ do_rest:

 		cpu_clear(cpu, cpu_present_map);

 		cpu_clear(cpu, cpu_possible_map);

 		x86_cpu_to_apicid[cpu] = BAD_APICID;

-		x86_cpu_to_log_apicid[cpu] = BAD_APICID;

 		ret...
[ message continues ]

From: "Oliver Pinter" <oliver.pntr@gmail.com>
Change the sort in arch/i386/Kconfig.cpu file, while it is logicaller (by

productions time-line).
Signed-off-by: Oliver Pinter <oliver.pntr@gmail.com>

Signed-off-by: Andi Kleen <ak@suse.de>

Acked-by: Sam Ravnborg <sam@ravnborg.org>

Cc: Andi Kleen <ak@suse.de>

Signed-off-by: Andrew Morton <akpm@linux-foundation.org>

---
 arch/i386/Kconfig.cpu |   13 ++++++-------

 1 file changed, 6 insertions(+), 7 deletions(-)
Index: linux/arch/i386/Kconfig.cpu

===================================================================

--- linux.orig/arch/i386/Kconfig.cpu

+++ linux/arch/i386/Kconfig.cpu

@@ -104,13 +104,6 @@ config MPENTIUMM

 	  Select this for Intel Pentium M (not Pentium-4 M)

 	  notebook chips.
-config MCORE2

-	bool "Core 2/newer Xeon"

-	help

-	  Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and 53xx)

-	  CPUs. You can distinguish newer from older Xeons by the CPU family

-	  in /proc/cpuinfo. Newer ones have 6.

-

 config MPENTIUM4

 	bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"

 	help

@@ -147,6 +140,12 @@ config MPENTIUM4
 	  more info: http://balusc.xs4all.nl/srv/har-cpu.html
+config MCORE2

+	bool "Core 2/newer Xeon"

+	help

+	  Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and 53xx)

+	  CPUs. You can distinguish newer from older Xeons by the CPU family

+	  in /proc/cpuinfo. Newer ones have 6.
 config MK6

 	bool "K6/K6-II/K6-III"

-

From: "Oliver Pinter" <oliver.pntr@gmail.com>
add cpu core name for arch/i386/Kconfig.cpu:Pentium 4 sections help

add Pentium D for arch/i386/Kconfig.cpu

add Pentium D for arch/x86_64/Kconfig
Signed-off-by: Oliver Pinter <oliver.pntr@gmail.com>

Signed-off-by: Andi Kleen <ak@suse.de>

Acked-by: Sam Ravnborg <sam@ravnborg.org>

Cc: Andi Kleen <ak@suse.de>

Signed-off-by: Andrew Morton <akpm@linux-foundation.org>

---
 arch/i386/Kconfig.cpu |   34 +++++++++++++++++++++++++++++++---

 arch/x86_64/Kconfig   |    6 +++---

 2 files changed, 34 insertions(+), 6 deletions(-)
Index: linux/arch/i386/Kconfig.cpu

===================================================================

--- linux.orig/arch/i386/Kconfig.cpu

+++ linux/arch/i386/Kconfig.cpu

@@ -115,11 +115,39 @@ config MPENTIUM4

 	bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"

 	help

 	  Select this for Intel Pentium 4 chips.  This includes the

-	  Pentium 4, P4-based Celeron and Xeon, and Pentium-4 M

-	  (not Pentium M) chips.  This option enables compile flags

-	  optimized for the chip, uses the correct cache shift, and

+	  Pentium 4, Pentium D, P4-based Celeron and Xeon, and

+	  Pentium-4 M (not Pentium M) chips.  This option enables compile

+	  flags optimized for the chip, uses the correct cache shift, and

 	  applies any applicable Pentium III optimizations.
+	  CPUIDs: F[0-6][1-A] (in /proc/cpuinfo show = cpu family : 15 )

+

+	  Select this for:

+	    Pentiums (Pentium 4, Pentium D, Celeron, Celeron D) corename:

+		-Willamette

+		-Northwood

+		-Mobile Pentium 4

+		-Mobile Pentium 4 M

+		-Extreme Edition (Gallatin)

+		-Prescott

+		-Prescott 2M

+		-Cedar Mill

+		-Presler

+		-Smithfiled

+	    Xeons (Intel Xeon, Xeon MP, Xeon LV, Xeon MV) corename:

+	    	-Foster

+		-Prestonia

+		-Gallatin

+		-Nocona

+		-Irwindale

+		-Cranford

+		-Potomac

+		-Paxville

+		-Dempsey

+

+	  more info: http://balusc.xs4all.nl/srv/har-cpu.html

+

+

 config MK6

 	bool "K6/K6-II/K6...
[ message continues ]

This will never be up to date. Also the URL above is redirected to an

empty bye/bye page. Put this up to one of the kernel related wikis, if

you think it might be useful at all. 99% of the users do not even know

which CPU they have in their system.
	tglx
-

It will. There are no new P4 cores anymore.
-Andi

-

On Sat, Sep 22, 2007 at 12:32:02AM +0200, Andi Kleen wrote:
 > +	  Select this for:

 > +	    Pentiums (Pentium 4, Pentium D, Celeron, Celeron D) corename:

 > +		-Willamette

 > +		-Northwood

 > +		-Mobile Pentium 4

 > +		-Mobile Pentium 4 M

 > +		-Extreme Edition (Gallatin)

 > +		-Prescott

 > +		-Prescott 2M

 > +		-Cedar Mill

 > +		-Presler

 > +		-Smithfiled

 > +	    Xeons (Intel Xeon, Xeon MP, Xeon LV, Xeon MV) corename:

 > +	    	-Foster

 > +		-Prestonia

 > +		-Gallatin

 > +		-Nocona

 > +		-Irwindale

 > +		-Cranford

 > +		-Potomac

 > +		-Paxville

 > +		-Dempsey
This seems like yet another list that will need to be perpetually

kept up to date, and given 99% of users don't know the codename

of their core, just the marketing name, I question its value.
 > +	  more info: http://balusc.xs4all.nl/srv/har-cpu.html
This URL is dead already.
 >  config MPSC

 >         bool "Intel P4 / older Netburst based Xeon"

 >         help
sidenote: I always wondered what 'PSC' stood for ?
	Dave
--

http://www.codemonkey.org.uk

-

The problem is that it is hard to distingush Core2 based Xeons

from P4 based Xeons.
There won't be any new Pentium 4 cores so that list should be static.

But yes the C2 list is a little problematic. Will remove that

and just say "family 6" 
Perhaps we should just bit the bullet and add a "optimize for current 
Prescott; the Intel codename for their first x86-64 core.

Rhymes with K8 which was AMD's codename for the same.
Admittedly MCORE2 doesn't fit the pattern, it should have

been MMEROM. But then when the C2 support was implemented

the Marketing name was already known, which wasn't the case

with the others.
-Andi

-

As a bare minimum requirement the list presented here shall use same

names as used in /proc/cpuinfo
On this box I read:
vendor_id	: GenuineIntel

model name	: Pentium III (Coppermine)
This info must be present in Kconfig text (help text) too.

I always have trouble selecting the right CPU before so I welcome this patch

that give me more info - and maybe a bit too much.
	Sam

-

On Sat, Sep 22, 2007 at 08:57:24AM +0200, Sam Ravnborg wrote:
 > > This seems like yet another list that will need to be perpetually

 > > kept up to date, and given 99% of users don't know the codename

 > > of their core, just the marketing name, I question its value.

 >

 > As a bare minimum requirement the list presented here shall use same

 > names as used in /proc/cpuinfo

 >

 > On this box I read:

 >

 > vendor_id	: GenuineIntel

 > model name	: Pentium III (Coppermine)
There are *dozens* of possible entries here, and always new ones.

The list will become so cumbersome that searching for the name

through the help text of each possible option will become a

really boring task, that I doubt anyone will seriously do.
	Dave
--

http://www.codemonkey.org.uk

-

Yep.  help text:  see www.wikipedia.org :)
---

~Randy

*** Remember to use Documentation/SubmitChecklist when testing your code ***

-

model name      : AMD Athlon(tm) XP 2000+
here. Seems like Intel encodes their codenames into cpuid :(

-

Produces Smoke and Cooks ?

-

From: "Yinghai Lu" <yhlu.kernel@gmail.com>
Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>

Signed-off-by: Andi Kleen <ak@suse.de>

Cc: Christoph Lameter <clameter@sgi.com>

Cc: Andi Kleen <ak@suse.de>

Cc: Len Brown <lenb@kernel.org>

Signed-off-by: Andrew Morton <akpm@linux-foundation.org>

---
 arch/x86_64/kernel/apic.c |    5 ++---

 include/asm-x86_64/apic.h |    1 -

 2 files changed, 2 insertions(+), 4 deletions(-)
Index: linux/arch/x86_64/kernel/apic.c

===================================================================

--- linux.orig/arch/x86_64/kernel/apic.c

+++ linux/arch/x86_64/kernel/apic.c

@@ -39,7 +39,6 @@

 #include <asm/hpet.h>

 #include <asm/apic.h>
-int apic_mapped;

 int apic_verbosity;

 int apic_runs_main_timer;

 int apic_calibrate_pmtmr __initdata;

@@ -697,8 +696,8 @@ void __init init_apic_mappings(void)

 		apic_phys = mp_lapic_addr;
 	set_fixmap_nocache(FIX_APIC_BASE, apic_phys);

-	apic_mapped = 1;

-	apic_printk(APIC_VERBOSE,"mapped APIC to %16lx (%16lx)\n", APIC_BASE, apic_phys);

+	apic_printk(APIC_VERBOSE, "mapped APIC to %16lx (%16lx)\n",

+				APIC_BASE, apic_phys);
 	/* Put local APIC into the resource map. */

 	lapic_resource.start = apic_phys;

Index: linux/include/asm-x86_64/apic.h

===================================================================

--- linux.orig/include/asm-x86_64/apic.h

+++ linux/include/asm-x86_64/apic.h

@@ -19,7 +19,6 @@

 extern int apic_verbosity;

 extern int apic_runs_main_timer;

 extern int ioapic_force;

-extern int apic_mapped;
 /*

  * Define the default level of output to be very little

-

From: "Yinghai Lu" <yhlu.kernel@gmail.com>
We shoud use core id bits instead of max cores, in case later with AMD

downcores Quad core Opteron.
Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>

Signed-off-by: Andi Kleen <ak@suse.de>

Cc: Christoph Lameter <clameter@sgi.com>

Cc: Andi Kleen <ak@suse.de>

Cc: Len Brown <lenb@kernel.org>

Signed-off-by: Andrew Morton <akpm@linux-foundation.org>

---
 arch/x86_64/mm/k8topology.c |   17 ++++++++++-------

 1 file changed, 10 insertions(+), 7 deletions(-)
Index: linux/arch/x86_64/mm/k8topology.c

===================================================================

--- linux.orig/arch/x86_64/mm/k8topology.c

+++ linux/arch/x86_64/mm/k8topology.c

@@ -44,12 +44,14 @@ int __init k8_scan_nodes(unsigned long s

 {

 	unsigned long prevbase;

 	struct bootnode nodes[8];

-	int nodeid, i, j, nb;

+	int nodeid, i, nb;

 	unsigned char nodeids[8];

 	int found = 0;

 	u32 reg;

 	unsigned numnodes;

-	unsigned num_cores;

+	unsigned cores;

+	unsigned bits;

+	int j;
 	if (!early_pci_allowed())

 		return -1;

@@ -60,9 +62,6 @@ int __init k8_scan_nodes(unsigned long s
 	printk(KERN_INFO "Scanning NUMA topology in Northbridge %d\n", nb); 
-	num_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;

-	printk(KERN_INFO "CPU has %d num_cores\n", num_cores);

-

 	reg = read_pci_config(0, nb, 0, 0x60);

 	numnodes = ((reg >> 4) & 0xF) + 1;

 	if (numnodes <= 1)

@@ -168,11 +167,15 @@ int __init k8_scan_nodes(unsigned long s

 	}

 	printk(KERN_INFO "Using node hash shift of %d\n", memnode_shift); 
+	/* use the coreid bits from early_identify_cpu */

+	bits = boot_cpu_data.x86_coreid_bits;

+	cores = (1<<bits);

+

 	for (i = 0; i < 8; i++) {

 		if (nodes[i].start != nodes[i].end) {

 			nodeid = nodeids[i];

-			for (j = 0; j < num_cores; j++)

-				apicid_to_node[(nodeid * num_cores) + j] = i;

+			for (j = 0; j < cores; j++)

+				apicid_to_node[(nodeid << bits) + j] = i;

 		...
[ message continues ]

From: "Yinghai Lu" <yhlu.kernel@gmail.com>
We need to store core id bits to cpuinfo_x86 in early_identify_cpu. So we

use it to create acpiid_to_node array in k8topolgy.c
Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>

Signed-off-by: Andi Kleen <ak@suse.de>

Cc: Christoph Lameter <clameter@sgi.com>

Cc: Andi Kleen <ak@suse.de>

Cc: Len Brown <lenb@kernel.org>

Signed-off-by: Andrew Morton <akpm@linux-foundation.org>

---
 arch/x86_64/kernel/setup.c     |   72 +++++++++++++++++++++++++++--------------

 include/asm-x86_64/processor.h |    1

 2 files changed, 49 insertions(+), 24 deletions(-)
Index: linux/arch/x86_64/kernel/setup.c

===================================================================

--- linux.orig/arch/x86_64/kernel/setup.c

+++ linux/arch/x86_64/kernel/setup.c

@@ -499,18 +499,7 @@ static void __init amd_detect_cmp(struct

 	int node = 0;

 	unsigned apicid = hard_smp_processor_id();

 #endif

-	unsigned ecx = cpuid_ecx(0x80000008);

-

-	c->x86_max_cores = (ecx & 0xff) + 1;

-

-	/* CPU telling us the core id bits shift? */

-	bits = (ecx >> 12) & 0xF;

-

-	/* Otherwise recompute */

-	if (bits == 0) {

-		while ((1 << bits) < c->x86_max_cores)

-			bits++;

-	}

+	bits = c->x86_coreid_bits;
 	/* Low order bits define the core id (index of core in socket) */

 	c->cpu_core_id = c->phys_proc_id & ((1 << bits)-1);

@@ -546,6 +535,34 @@ static void __init amd_detect_cmp(struct

 #endif

 }
+static void __cpuinit early_init_amd(struct cpuinfo_x86 *c)

+{

+#ifdef CONFIG_SMP

+	unsigned bits;

+	unsigned ecx;

+

+	/* Multi core CPU? */

+	if (c->extended_cpuid_level < 0x80000008)

+		return;

+

+	ecx = cpuid_ecx(0x80000008);

+

+	c->x86_max_cores = (ecx & 0xff) + 1;

+

+	/* CPU telling us the core id bits shift? */

+	bits = (ecx >> 12) & 0xF;

+

+	/* Otherwise recompute */

+	if (bits == 0) {

+		while ((1 << bits) < c->x86_max_cores)

+			bits...
[ message continues ]