The overhead of timer interrupts at this low clockrate is significant
so I recommend to minimize the timer interrupt rate as far as possible.
This is really a tradeoff between latency and overhead and matters
much less on hardcores which run at hundreds of MHz. For power sensitive
applications lowering the interrupt rate can also help. And that's alredy
pretty much what you need to know, that is a 10ms timer is fine.
Btw, is this coincidentally on a CoreFPGA 2 or 3 CPU card on a Malta board?
I have worked with FPGA Linux system which is reconfigurable
on-the-fly by the 200Mhz ARM9 CPU running Debian Linux, Altera Cyclone
II FPGA is included on my TS-7300 board. Advantage is, Altera FPGA and
a dedicated high-speed bus between the CPU and FPGA provides a good
design scope to provide many solutions.
Coming to boot up (by an USB 1GB SD card), by doing enough software
tuning bootup to a Linux prompt takes just 1.69 seconds after
power-up. If I remember correctly, SD image will look at the state of
jumper 6 (should be put ON), the full Debian bootup will be bypassed
and the system will instead drop straight to a shell prompt. 1.69
seconds after power-on the serial console prompt is active and 2.41
seconds after power-on the video console is displayed.
This software is based on Debian & has a vendor supplied Linux boot
loader. Currently am working (slowly in free time) to bring the whole