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ARM: Fix ioremap_cached()/ioremap_wc() for SMP platforms

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From: Linux Kernel Mailing List
Subject: ARM: Fix ioremap_cached()/ioremap_wc() for SMP platforms
Date: Monday, April 12, 2010 - 7:59 pm

Gitweb:     http://git.kernel.org/linus/85b3cce880a19e78286570d5fd004cc3cac06f57
Commit:     85b3cce880a19e78286570d5fd004cc3cac06f57
Parent:     9823f1a8463fb631fe965110fe19adeb3df239c4
Author:     Russell King <rmk+kernel@arm.linux.org.uk>
AuthorDate: Fri Apr 9 15:00:11 2010 +0100
Committer:  Russell King <rmk+kernel@arm.linux.org.uk>
CommitDate: Fri Apr 9 15:00:11 2010 +0100

    ARM: Fix ioremap_cached()/ioremap_wc() for SMP platforms
    
    Write combining/cached device mappings are not setting the shared bit,
    which could potentially cause problems on SMP systems since the cache
    lines won't participate in the cache coherency protocol.
    
    Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
    Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
 arch/arm/mm/mmu.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 9d4da6a..4223d08 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -420,6 +420,10 @@ static void __init build_mem_type_table(void)
 		user_pgprot |= L_PTE_SHARED;
 		kern_pgprot |= L_PTE_SHARED;
 		vecs_pgprot |= L_PTE_SHARED;
+		mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_S;
+		mem_types[MT_DEVICE_WC].prot_pte |= L_PTE_SHARED;
+		mem_types[MT_DEVICE_CACHED].prot_sect |= PMD_SECT_S;
+		mem_types[MT_DEVICE_CACHED].prot_pte |= L_PTE_SHARED;
 		mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
 		mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S;
 #endif
--


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