cirrusfb: fix threshold register mask for Laguna chips

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From: Linux Kernel Mailing List
Date: Wednesday, April 1, 2009 - 11:04 am

Gitweb:     http://git.kernel.org/linus/4242a23c9e6b8e2462bb49bf78b76bfdf32158b5
Commit:     4242a23c9e6b8e2462bb49bf78b76bfdf32158b5
Parent:     df3aafd57d590d6f3d95310fc3430f3a536d1e59
Author:     Krzysztof Helt <krzysztof.h1@wp.pl>
AuthorDate: Tue Mar 31 15:25:17 2009 -0700
Committer:  Linus Torvalds <torvalds@linux-foundation.org>
CommitDate: Wed Apr 1 08:59:29 2009 -0700

    cirrusfb: fix threshold register mask for Laguna chips
    
    Fix threshold register mask for Laguna chips otherwise some 8bpp modes are
    garbled after selecting a 24bpp mode.
    
    Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl>
    Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
    Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
---
 drivers/video/cirrusfb.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/video/cirrusfb.c b/drivers/video/cirrusfb.c
index a364e1b..9bb811d 100644
--- a/drivers/video/cirrusfb.c
+++ b/drivers/video/cirrusfb.c
@@ -875,7 +875,7 @@ static int cirrusfb_set_par_foo(struct fb_info *info)
 		threshold = fb_readw(cinfo->laguna_mmio + 0xea);
 		control &= ~0x6800;
 		format = 0;
-		threshold &= 0xffe0 & 0x3fbf;
+		threshold &= 0xffc0 & 0x3fbf;
 	}
 	if (nom) {
 		tmp = den << 1;
--

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