Gitweb:     http://git.kernel.org/linus/5864810bc50de57e1b4757850d3208f69579af7f
Commit:     5864810bc50de57e1b4757850d3208f69579af7f
Parent:     d7001198366bffce4506ba21b7b0fee2de194f73
Author:     Shinya Kuribayashi <shinya.kuribayashi@necel.com>
AuthorDate: Wed Mar 18 09:04:01 2009 +0900
Committer:  Ralf Baechle <ralf@linux-mips.org>
CommitDate: Mon Mar 23 23:38:04 2009 +0100

    MIPS: VR5500: Enable prefetch
    
    Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
    Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---
 arch/mips/mm/c-r4k.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index c43f4b2..871e828 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -780,7 +780,7 @@ static void __cpuinit probe_pcache(void)
 		c->dcache.ways = 2;
 		c->dcache.waybit = 0;
 
-		c->options |= MIPS_CPU_CACHE_CDEX_P;
+		c->options |= MIPS_CPU_CACHE_CDEX_P | MIPS_CPU_PREFETCH;
 		break;
 
 	case CPU_TX49XX:
--
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